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ICX274AQ

Drive

Timing Char

t (V

er

tical Sync)

Center Scan Mode (2)/(28.6MHz)

"b" enlar

g

e

d

H1A/H1B

V1

V2C

V2A/V2B

V3C

V3A/V3B

V4

18

18

18

18

18

18

18

18

# (3 + 5)

# (4 + 6)

# (185 + 187)

18

18

18

18

18

18

18

18

27936 bits

28980 bits = 14H

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Summary of Contents for ICX274AQ

Page 1: ...meras PC input cameras etc Features High horizontal and vertical resolution Supports the following modes Progressive scan mode with without mechanical shutter 2 8 line readout mode 2 4 line readout mode 2 line addition mode Center scan modes 1 2 and 3 AF modes 1 and 2 Square pixel Horizontal drive frequency 28 6364MHz typ 36 0MHz max Reset gate bias are not adjusted R G B primary color mosaic filt...

Page 2: ...iption Pin No Symbol Description 1 2 3 4 5 6 7 8 9 10 Vφ4 Vφ3A Vφ3B Vφ3C Vφ2A Vφ2B Vφ2C Vφ1 GND VOUT Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock GND Signal output 11 12 13 14 15 16...

Page 3: ... C Hφ1β Hφ2β GND β A B Vφ2α Vφ3α VL α A to C Vφ1 Vφ4 Hφ1β Hφ2β GND VL β A B Voltage difference between vertical clock input pins Hφ1β Hφ2β β A B Hφ1β Hφ2β Vφ4 β A B Against φSUB Against GND Against VL Between input clock pins Storage temperature Guaranteed temperature of performance Operating temperature 40 to 12 50 to 15 50 to 0 3 40 to 0 3 25 to 0 3 to 22 10 to 18 10 to 6 5 0 3 to 28 0 3 to 15 t...

Page 4: ... The code and the actual value correspond as follows Example h indicates a VSUB2 setting of 11 6V 5 Do not apply a DC bias to the reset gate clock pin because a DC bias is generated within the CCD DC characteristics Supply current Item IDD Symbol 10 0 Min Unit Remarks Typ Max mA 13 0 7 0 J 11 8 K 12 0 L 12 2 m 12 4 N 12 6 P 12 8 R 13 0 S 13 2 U 13 4 V 13 6 W 13 8 X 14 0 Y 14 2 Z 14 4 VSUB2 code Ac...

Page 5: ...RGL VRGLm VφSUB Symbol 14 55 0 05 0 2 8 0 6 8 0 25 0 25 4 75 0 05 0 8 3 0 21 5 Min 15 0 0 0 7 5 7 5 5 0 0 2 5 3 3 22 5 Typ 15 45 0 05 0 05 7 0 8 05 0 1 0 1 0 5 0 5 0 5 0 5 5 25 0 05 5 25 0 4 0 5 23 5 Max Unit 1 2 2 2 2 2 2 2 2 2 2 3 3 3 4 4 4 5 Waveform diagram VVH VVH1 VVH2 2 VVL VVL3 VVL4 2 VφV VVHn VVLn n 1 to 4 High level coupling High level coupling Low level coupling Low level coupling Cross...

Page 6: ...vertical transfer clock and GND Capacitance between vertical transfer clocks Capacitance between horizontal transfer clock and GND Capacitance between horizontal transfer clocks Capacitance between reset gate clock and GND Capacitance between substrate clock and GND Vertical transfer clock series resistor Vertical transfer clock ground resistor Horizontal transfer clock series resistor Horizontal ...

Page 7: ...l relative to other capacitance between other vertical clocks in the equivalent circuit so these are omitted from the equivalent circuit diagram Vφ4 Vφ1 Vφ2α α A to C Vφ3α α A to C CφV2α4 α A to C RGND CφV1 CφV3α α A to C CφV4 CφV2α α A to C CφV2α3α α A to C CφV3α4 α A to C CφV12α α A to C CφV13α α A to C CφV14 R4 R3α α A to C R1 R2α α A to C Hφ1B Hφ2B CφH1 CφH2 CφHH RφH RφH2 RφH Hφ1A Hφ2A RφH RφH...

Page 8: ...Ln n 1 to 4 2 Vertical transfer clock waveform 100 90 10 0 tr tf 0V twh φM 2 φM VVT VVH1 VVHH VVHL VVH VVLH VVL1 VVLL VVHL VVHH VVL VVH2 VVHH VVHH VVHL VVHL VVH VVLH VVL2 VVLL VVL VVHH VVH VVLH VVLL VVL VVHL VVL3 VVHL VVH3 VVHH VVH VVL VVHL VVLH VVLL VVHL VVH4 VVHH VVHH VVL4 Vφ1 Vφ3A Vφ3B Vφ3C Vφ2A Vφ2B Vφ2C Vφ4 ...

Page 9: ...s is VCR The overlap period for twh and twl of horizontal transfer clocks Hφ1β and Hφ2β is two β A B 4 Reset gate clock waveform VRGLH is the maximum value and VRGLL is the minimum value of the coupling waveform during the period from Point A in the above diagram until the rising edge of RG In addition VRGL is the average value of VRGLH and VRGLL VRGL VRGLH VRGLL 2 Assuming VRGH is the minimum val...

Page 10: ...ntal transfer clock Reset gate clock Substrate clock Symbol VT Vφ1 Vφ4 Vφ2α Vφ3α α A to C Hφ1β β A B Hφ2β β A B φRG φSUB Min two Typ Max 8 10 Unit ns Remarks Item Horizontal transfer clock Symbol Hφ1A Hφ1B Hφ2A Hφ2B Clock Switching Characteristics Horizontal drive frequency 36MHz Min twh Typ Max Min Typ Max Min Typ Max Min Typ Max twl tr tf 4 0 8 8 4 4 2 9 9 5 5 1 67 8 8 9 9 8 0 5 5 5 2 6 6 0 25 1...

Page 11: ... 11 ICX274AQ Spectral Sensitivity Characteristics excludes lens characteristics and light source characteristics 1 0 Relative Response 0 8 B G R 0 6 0 4 0 2 0 400 450 500 550 Wave Length nm 600 650 700 ...

Page 12: ...ics Ta 25 C Item G Sensitivity Sensitivity comparison Saturation signal Smear Video signal shading Uniformity between video signal channels Dark signal Dark signal shading Line crawl G Line crawl R Line crawl B Lag Symbol Sg Rr Rb Vsat Vsat2 1 Sm SH Srg Sbg Vdt Vdt Lcg Lcr Lcb Lag Min 335 0 35 0 45 400 400 Typ 420 0 5 0 6 100 94 88 Max 545 0 65 0 75 92 86 80 20 25 8 8 8 2 3 8 3 8 3 8 0 5 Unit mV m...

Page 13: ...as the R signal and the B signal respectively Gb B Gb B R Gr R Gr Gb B Gb B R Gr R Gr Horizontal register Color Coding Diagram 4 V 10 4 8 8 Ignored region Effective pixel region Zone 0 I Zone II II V 10 H 8 H 8 1628 H 1236 V Zone Definition of Video Signal Shading Measurement System CCD C D S S H S H AMP CCD signal output A Gr Gb channel signal output B R B channel signal output C Note Adjust the ...

Page 14: ...ely 1 20s by reading out the signals for only two out of four lines 3rd and 4th lines 7th and 8th lines and so on Readout modes The diagrams below and on the following pages show the output methods for the following nine readout modes 2 4 line readout mode Progressive scan mode 2 8 line readout mode 16 V2C V3C 15 V2C V3C 14 V2A V3A 13 V2B V3B 12 V2C V3C 11 V2C V3C 10 V2B V3B 9 V2A V3A 8 V2C V3C 7 ...

Page 15: ...for only two out of four lines 3rd and 4th lines 7th and 8th lines and so on are read out the vertical register is shifted by 2 bits and then the signals of the remaining two out of the four lines 1st and 2nd lines 5th and 6th lines and so on are read out and added within the vertical register The undesired portions are swept by vertical register high speed transfer and the vertical 1136 pixel reg...

Page 16: ...ransfer and the vertical 300 pixel region in the center of the picture is output in approximately 1 120s by reading out the signals for only two out of eight lines 1st and 6th lines 9th and 14th lines The number of output lines is 75 lines at 36MHz and 43 lines at 28 6364MHz This mode aims for even faster AF control than 2 8 line readout mode AF mode 2 Center scan mode 3 AF mode 1 16 V2C V3C 15 V2...

Page 17: ... are read out and added within the vertical register Center scan mode 3 The output method is the same as progressive scan mode The readout method frame rate number of output lines and other information for each readout mode are shown in the table below Undesired portions Swept by vertical register high speed transfer Picture center cut out portion Mode Frame rate frame s Progressive scan mode 2 8 ...

Page 18: ...r speed of 1 100s measure the signal voltages VGr VGb at the center of each Gr and Gb channel screen and substitute the values into the following formulas VG VGr VGb 2 Sg VG mV 2 Saturation signal Set to the standard imaging condition II After adjusting the luminous intensity to 20 times the intensity with the average value of the G channel signal output 150mV measure the minimum values of the G R...

Page 19: ... C and the device in the light obstructed state using the horizontal idle transfer level as a reference 7 Dark signal shading After measuring 6 measure the maximum Vdmax mV and minimum Vdmin mV values of the dark signal output and substitute the values into the following formula Vdt Vdmax Vdmin mV 8 Line crawl Set to the standard imaging condition II Adjusting the luminous intensity so that the va...

Page 20: ... Hφ 2A Hφ 1A V L C SUB φSUB GND Hφ 1B Hφ 2B φRG V DD 11 12 13 14 15 16 17 18 19 20 10 9 8 7 6 5 4 3 2 1 CXD3400N 11 12 13 14 15 16 17 18 19 20 10 9 8 7 6 5 4 3 2 1 CXD3400N DCIN GND V SUB2 V SUB 2 line addition mode Center scan mode 2 Substrate bias adjustment input voltage VSUB in the circuit diagram above Substrate bias φSUB pin voltage Modes other than the above Internally generated value Note ...

Page 21: ... horizontal period at 28MHz is 1860clk HD V1 VD V2 V4 V3 1249 1250 1251 1252 1492 a a 1493 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1249 1250 1251 1252 1492 1493 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1235 1236 1 2 3 4 5 6 7 8 9 10 1 2 3 4 5 6 7 8 9 10 1236 1235 1 2 3 4 5 6 7 8 9 10 1 2 3 4 5 6 7 8 9 10 1236 36MHz 28 6MHz 28 6MHz 36MHz CCD OUT ...

Page 22: ...iming Chart Horizontal Sync Progressive Scan Mode RG CLK SHP SHD H1A H1B H2A H2B 1 1920 1 52 1 1 12 1 28 204 296 1 4 V1 V2A V2B V2C V3A V3B V3C V4 SUB 1 90 18 1 54 1 54 1 1 54 1 90 1 36 1 9 1 78 114 96 132 60 135 1 1 1 1 1 ...

Page 23: ... 23 ICX274AQ Drive Timing Chart Vertical Sync Progressive Scan Mode a enlarged H1A H1B V1 V2A V2B V2C V3A V3B V3C V4 18 18 18 18 18 18 18 18 60 18 18 18 18 18 1100 1250 ...

Page 24: ... 3 4 5 6 7 8 9 10 1 2 3 4 5 6 7 8 9 10 1235 1236 TRG SUB Mechanical shutter CLOSE OPEN V2A V2B V2C V4 HD 1 2 3 4 5 6 7 8 9 10 11 70 72 1321 1564 1565 1742 1 V3A V3B V3C V1 b a VD 28 6MHz 36MHz Note The 1564 and 1565H horizontal periods at 36MHz are 1021clk the 1742H horizontal period at 28MHz is 1530clk ...

Page 25: ...Mechanical Shutter b enlarged H1A H1B 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 60 2 1 3 1865 134400 bits 1 V1 V2C V2A V2B V3C V3A V3B V4 ...

Page 26: ... Chart Vertical Sync 2 8 line Readout Mode HD V1 VD V2A V2B V2C V4 V3A V3B V3C a a 511 510 407 406 312 311 1 2 3 4 5 6 7 8 9 10 11 12 13 14 511 510 406 407 311 312 1 2 3 4 5 6 7 8 9 10 11 12 13 14 8 3 1 6 9 14 17 22 25 30 33 38 41 46 1230 1225 1233 1225 8 3 1 6 9 14 17 22 25 30 33 38 41 46 1230 1233 36MHz 28 6MHz 28 6MHz 36MHz CCD OUT ...

Page 27: ...54 1 1 1 90 18 1 90 1 90 1 72 54 1 54 1 54 1 60 1 54 1 1 54 1 54 1 54 1 54 90 1 90 1 90 1 1 60 36 1 54 1 1 54 1 54 1 54 1 54 90 1 90 1 90 1 1 60 36 1 90 1 1 54 1 54 1 54 1 54 90 1 90 1 90 1 60 1 90 1 1 54 1 54 1 54 1 54 90 1 90 1 90 1 60 1 90 1 1 54 1 1 36 1 54 1 54 1 1 18 90 1 90 1 90 60 1 1 9 60 567 1 2352 1 52 1 1 12 1 28 636 728 1 4 ...

Page 28: ...2A V2B V2C V3A V3B V3C V4 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 42 1100 1250 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 60 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 ...

Page 29: ...tal period at 36MHz is 900clk the 693H horizontal period at 28MHz is 810clk HD V1 VD V2C V2A V2B V4 V3C V3A V3B 871 693 625 1 2 3 4 5 6 7 8 9 10 871 693 652 1 2 3 4 5 6 7 8 9 10 6 5 9 10 3 4 7 8 1232 1231 1235 1236 1231 6 5 9 10 3 4 7 8 1232 1235 1236 36MHz 28 6MHz 28 6MHz 36MHz CCD OUT a a ...

Page 30: ...l Sync 2 4 line Readout Mode RG CLK SHP SHD H1A H1B H2A H2B 1 2070 1 52 1 1 12 1 28 354 446 1 4 V1 V2A V2B V2C V3A V3B V3C V4 SUB 1 54 1 90 1 54 18 1 1 1 1 1 1 54 90 1 1 54 138 54 1 1 54 1 54 90 1 102 1 90 1 1 54 1 36 1 84 120 90 1 1 12 60 282 ...

Page 31: ...cal Sync 2 4 line Readout Mode a enlarged H1A H1B V1 V2C V2A V2B V3C V3A V3B V4 18 54 18 18 18 18 18 18 18 18 18 18 18 18 18 18 54 150 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 66 600 750 ...

Page 32: ...6 7 8 9 10 871 693 625 1 2 3 4 5 6 7 8 9 10 4 3 7 8 1 2 5 6 6 5 9 10 3 4 7 8 1230 1229 1233 1234 1 2 1232 1231 1235 1236 1229 4 3 7 8 1 2 5 6 6 5 9 10 3 4 7 8 1230 1233 1234 1 2 1231 1232 1235 1236 36MHz 28 6MHz 28 6MHz 36MHz CCD OUT Note The 871H horizontal period at 36MHz is 900clk the 693H horizontal period at 28MHz is 810clk ...

Page 33: ...l Sync 2 line Addition Mode RG CLK SHP SHD H1A H1B H2A H2B 1 2070 1 52 1 1 12 1 28 354 446 1 4 V1 V2A V2B V2C V3A V3B V3C V4 SUB 1 54 1 90 1 54 18 1 1 1 1 1 1 54 90 1 1 54 138 54 1 1 54 1 54 90 1 102 1 90 1 1 54 1 36 1 84 120 90 1 1 12 60 282 ...

Page 34: ...ical Sync 2 line Addition Mode a enlarged H1A H1B V1 V2C V2A V2B V3C V3A V3B V4 18 54 18 18 18 18 18 18 18 18 18 18 18 18 18 18 54 150 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 66 600 750 ...

Page 35: ... V1 VD V2C V2A V2B V4 V3C V3A V3B d a b a b d 462 461 459 458 460 452 451 453 450 1 2 3 4 5 6 7 8 9 10 15 17 462 461 459 460 453 451 452 450 1 2 3 4 5 6 7 8 9 10 15 17 188 191 192 195 1055 1052 1048 188 191 192 1051 1052 1055 CCD OUT Note The 462H horizontal period is 1230clk ...

Page 36: ...de 1 36MHz Note The 581H horizontal period is 601clk HD V1 VD V2C V2A V2B V4 V3C V3A V3B d a b a b d 581 580 578 577 576 579 1 2 3 4 5 6 7 8 9 10 581 580 578 579 577 576 1 2 3 4 5 6 7 8 9 10 60 55 56 59 1188 1183 1187 1184 55 56 59 60 1183 1184 1187 1188 CCD OUT ...

Page 37: ...tical Sync Center Scan Mode 1 a enlarged H1A H1B V1 V2C V2A V2B V3C V3A V3B V4 18 54 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 66 600 750 ...

Page 38: ...38 ICX274AQ Drive Timing Chart Vertical Sync Center Scan Mode 1 28 6MHz b enlarged H1A H1B V1 V2C V2A V2B V3C V3A V3B V4 18 18 18 18 18 18 18 18 5 6 187 18 18 18 18 18 18 18 18 27936 bits 28980 bits 14H ...

Page 39: ... 39 ICX274AQ Drive Timing Chart Vertical Sync Center Scan Mode 1 36MHz b enlarged H1A H1B V1 V2C V2A V2B V3C V3A V3B V4 18 18 18 18 18 18 18 18 5 6 52 18 18 18 18 18 18 18 18 8784 bits 10350 bits 5H ...

Page 40: ...k HD V1 VD V2C V2A V2B V4 V3C V3A V3B d a b a d b 462 461 459 458 460 454 453 455 456 457 452 1 2 3 4 5 6 7 8 9 10 15 18 462 461 459 460 458 456 457 455 453 454 452 1 2 3 4 5 6 7 8 9 10 15 18 186 189 190 193 1053 1050 1055 1052 1046 186 189 190 188 191 192 1049 1050 1053 188 191 192 195 1048 1051 1052 1055 CCD OUT ...

Page 41: ...tal period is 601clk HD V1 VD V2C V2A V2B V4 V3C V3A V3B d a b a b d 581 580 578 577 576 579 1 2 3 4 5 6 7 8 9 10 581 580 578 579 577 576 1 2 3 4 5 6 7 8 9 10 58 53 54 57 60 55 56 59 1188 1183 1187 1184 53 54 57 58 55 56 59 60 1183 1184 1187 1188 1186 1181 1185 1182 1181 1182 1185 1186 CCD OUT ...

Page 42: ... Chart Vertical Sync Center Scan Mode 2 a enlarged H1A H1B V1 V2C V2A V2B V3C V3A V3B V4 18 54 18 18 18 18 18 18 18 18 18 18 18 18 18 18 54 150 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 66 600 750 ...

Page 43: ...CX274AQ Drive Timing Chart Vertical Sync Center Scan Mode 2 28 6MHz b enlarged H1A H1B V1 V2C V2A V2B V3C V3A V3B V4 18 18 18 18 18 18 18 18 3 5 4 6 185 187 18 18 18 18 18 18 18 18 27936 bits 28980 bits 14H ...

Page 44: ...4 ICX274AQ Drive Timing Chart Vertical Sync Center Scan Mode 2 36MHz b enlarged H1A H1B V1 V2C V2A V2B V3C V3A V3B V4 18 18 18 18 18 18 18 18 3 5 4 6 50 52 18 18 18 18 18 18 18 18 8784 bits 10350 bits 5H ...

Page 45: ...Sync Center Scan Modes 1 and 2 RG CLK SHP SHD H1A H1B H2A H2B 1 2070 1 52 1 1 12 1 28 354 446 1 4 V1 V2A V2B V2C V3A V3B V3C V4 SUB 1 54 1 90 1 90 18 1 1 1 1 1 1 54 90 1 1 54 138 54 1 1 54 1 54 90 1 102 1 90 1 1 54 1 36 1 84 120 90 1 1 12 60 282 ...

Page 46: ...Scan Modes 1 and 2 28 6MHz d enlarged H1A H1B 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 2 1 3 222 16560 bits 1 V1 V2C V2A V2B V3C V3A V3B V4 ...

Page 47: ...r Scan Modes 1 and 2 36MHz d enlarged H1A H1B 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 2 1 3 63 6210 bits 1 V1 V2C V2A V2B V3C V3A V3B V4 ...

Page 48: ...ical Sync Center Scan Mode 3 28 6MHz HD V1 VD V2 V4 V3 478 479 497 496 a d b a b d 498 1 2 3 4 5 6 32 33 34 35 478 479 497 496 498 1 2 3 4 5 6 32 33 34 35 839 397 398 840 839 397 398 840 CCD OUT Note The 498H horizontal period is 1260clk ...

Page 49: ...ical Sync Center Scan Mode 3 36MHz HD V1 VD V2 V4 V3 609 610 625 624 a d b a b d 626 1 2 3 4 5 6 27 28 29 30 31 609 610 625 624 626 1 2 3 4 5 6 27 28 29 30 907 329 330 908 907 329 330 908 CCD OUT Note The 626H horizontal period is 1200clk ...

Page 50: ...Timing Chart Horizontal Sync Center Scan Mode 3 RG CLK SHP SHD H1A H1B H2A H2B 1 1920 1 52 1 1 12 1 28 204 296 1 4 V1 V2A V2B V2C V3A V3B V3C V4 SUB 1 90 18 1 54 1 54 1 1 54 1 90 1 36 1 9 1 78 114 96 132 60 135 1 1 1 1 1 ...

Page 51: ... 51 ICX274AQ Drive Timing Chart Vertical Sync Center Scan Mode 3 a enlarged H1A H1B V1 V2A V2B V2C V3A V3B V3C V4 18 18 18 18 18 18 18 18 60 18 18 18 18 18 1100 1250 ...

Page 52: ... 52 ICX274AQ Drive Timing Chart Vertical Sync Center Scan Mode 3 28 6MHz b enlarged H1A H1B V1 V2C V2A V2B V3C V3A V3B V4 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 58608 bits 59520 bits 31H ...

Page 53: ... 53 ICX274AQ Drive Timing Chart Vertical Sync Center Scan Mode 3 36MHz b enlarged H1A H1B V1 V2C V2A V2B V3C V3A V3B V4 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 48816 bits 49920 bits 26H ...

Page 54: ...ter Scan Mode 3 28 6MHz d enlarged H1A H1B 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 2 1 3 398 34560 bits 1 V1 V2C V2A V2B V3C V3A V3B V4 ...

Page 55: ...nter Scan Mode 3 36MHz d enlarged H1A H1B 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 2 1 3 330 28800 bits 1 V1 V2C V2A V2B V3C V3A V3B V4 ...

Page 56: ...1 28 6MHz HD V1 VD V2A V2B V2C V4 CCD OUT V3A V3B V3C a b d a d b 204 203 202 201 191 190 1 2 3 4 5 6 7 8 19 20 21 22 204 203 202 201 191 190 1 2 3 4 5 6 7 8 9 19 20 21 22 286 289 958 953 286 289 958 953 Note The 203 and 204H horizontal periods are 1323clk ...

Page 57: ...ode 1 36MHz HD V1 VD V2A V2B V2C V4 CCD OUT V3A V3B V3C a b d a d b 256 255 254 249 248 1 2 3 4 5 6 7 8 9 11 10 12 13 14 256 255 254 249 248 1 2 3 4 5 6 7 8 9 10 11 12 13 14 153 158 1089 1086 153 158 1089 1086 Note The 256H horizontal period is 840clk ...

Page 58: ... 58 ICX274AQ Drive Timing Chart Vertical Sync AF Mode 1 28 6MHz b enlarged H1A H1B V1 V2C V2A V2B V3C V3A V3B V4 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 41904 bits 42336 bits 18H ...

Page 59: ... 59 ICX274AQ Drive Timing Chart Vertical Sync AF Mode 1 36MHz b enlarged H1A H1B V1 V2C V2A V2B V3C V3A V3B V4 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 22896 bits 23520 bits 10H ...

Page 60: ... AF Mode 1 28 6MHz d enlarged H1A H1B 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 2 1 3 339 25872 bits 1 V1 V2C V2A V2B V3C V3A V3B V4 ...

Page 61: ...c AF Mode 1 36MHz d enlarged H1A H1B 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 2 1 3 180 14112 bits 1 V1 V2C V2A V2B V3C V3A V3B V4 ...

Page 62: ...c AF Mode 2 28 6MHz HD V1 VD V2A V2B V2C V4 CCD OUT V3A V3B V3C a b d a d b 102 101 100 80 81 1 2 3 4 5 6 7 8 9 35 36 37 38 102 101 100 80 81 1 2 3 4 5 6 7 8 9 35 36 37 38 537 542 702 705 537 542 702 705 Note The 102H horizontal period is 1323clk ...

Page 63: ... AF Mode 2 36MHz HD V1 VD V2A V2B V2C V4 CCD OUT V3A V3B V3C a b d a d b 128 127 126 108 109 1 2 3 4 5 6 7 8 9 31 32 33 34 128 127 126 108 109 1 2 3 4 5 6 7 8 9 31 32 33 34 473 478 766 769 473 478 766 769 Note The 128H horizontal period is 1596clk ...

Page 64: ... 64 ICX274AQ Drive Timing Chart Vertical Sync AF Mode 2 28 6MHz b enlarged H1A H1B V1 V2C V2A V2B V3C V3A V3B V4 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 78192 bits 79968 bits 34H ...

Page 65: ... 65 ICX274AQ Drive Timing Chart Vertical Sync AF Mode 2 36MHz b enlarged H1A H1B V1 V2C V2A V2B V3C V3A V3B V4 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 68976 bits 70560 bits 30H ...

Page 66: ... AF Mode 2 28 6MHz d enlarged H1A H1B 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 2 1 3 640 47040 bits 1 V1 V2C V2A V2B V3C V3A V3B V4 ...

Page 67: ...c AF Mode 2 36MHz d enlarged H1A H1B 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 2 1 3 564 42336 bits 1 V1 V2C V2A V2B V3C V3A V3B V4 ...

Page 68: ... 1 1 1 90 18 1 90 1 90 1 72 54 1 54 1 54 1 60 1 54 1 1 54 1 54 1 54 1 54 90 1 90 1 90 1 1 60 36 1 54 1 1 54 1 54 1 54 1 54 90 1 90 1 90 1 1 60 36 1 90 1 1 54 1 54 1 54 1 54 90 1 90 1 90 1 60 1 90 1 1 54 1 54 1 54 1 54 90 1 90 1 90 1 60 1 90 1 1 54 1 1 36 1 54 1 54 1 1 18 90 1 90 1 90 60 1 1 9 60 567 1 2352 1 52 1 1 12 1 28 636 728 1 4 ...

Page 69: ...V3B V3C V4 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 42 1100 1250 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 60 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 ...

Page 70: ...n glass plates with the following operations as required and use them a Perform all assembly operations in a clean room class 1000 or less b Do not either touch glass plates by hand or have any object come in contact with glass surfaces Should dirt stick to a glass surface blow it off with an air blower For dirt stuck through static electricity ionized air is recommended c Clean with a cotton bud ...

Page 71: ... sun rays for long periods as color filters will be discolored When high luminous objects are imaged with the exposure level controlled by the electronic iris the luminance of the image plane may become excessive and discoloring of the color filter will possibly be accelerated In such a case it is advisable that taking lens with the automatic iris and closing of the shutter during the power off mo...

Page 72: ...he effective image area relative to H and V is 1 6 The height from the bottom C to the effective image area is 1 41 0 10mm The height from the top of the cover glass D to the effective image area is 1 49 0 15mm 7 The tilt of the effective image area relative to the bottom C is less than 50µm The tilt of the effective image area relative to the top D of the cover glass is less than 50µm 8 The thick...

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