ICD-UX71/UX71F/UX81/UX81F/UX91F
ICD-UX71/UX71F/UX81/UX81F/UX91F
19
19
4-8. SCHEMATIC DIAGRAM – MAIN Section (1/3) –
• See page 24 for IC Block Diagram. • See page 26 for IC Pin Function Description of IC5001.
14
C
K
13
3
12
F
10
15
L
8
E
5
D
16
6
1
4
M
I
G
17
7
2
N
H
A
J
18
11
9
B
19
12
(3/3)
MAIN
11
BOARD
14
13
BOARD
MAIN
(3/3)
16
BOARD
MAIN
(2/3)
15
BOARD
MAIN
(2/3)
BOARD
MAIN
(3/3)
BOARD
MAIN
(2/3)
IC B/D
3.1
1
3.1
0
3.1
0
2.9
0
3.2
3.1
3.1
EXCEPT LA MODEL
EXCEPT
LA MODEL
1
3
LC823403B-08B-E
IC5001
B2
TEST1
A1
TEST2
C2
TEST3
B1
TEST4
D2
TEST5
C1
TEST6
C3
TCK
D3
RT
C
K
D1
NTRST
E2
EXA16(A15)
D4
TDI
E3
EXA15(A14)
E1
EXA14(A13)
F2
TMS
E4
EXA13(A12)
E5
EXA12(A1
1)
F3
TDO
F1
NRES
G2
EXA1
1(A10)
F4
Vdd1
F5
EXA10(A9)
G3
Vss
H2
EXA9(A8)
G1
Vdd2
G4
EXA20(A19)
G5
NCS0
H3
EXA21(P2E)
H1
NCS1
J2
NWRENWRL/NWE
H4
NCS2(P20)
J1
NCS3(P10)
H5
NRESET
K2
NLBEXA0
K1
NHBNWRH
J3
PHI(P1
1)
J4
EXA19(A18)
M4
SDO1(P15)
L5
SDI1(P16)
R1
TXD1(P2A)
T1
RXD1(P2B)
T2
TCLKA(P17)
R3
TCLKB(P18)
T3
TIOCA0(P19)
R4
Vdd1
R2
TIOCB0(P1A)
P3
TIOCA1(P1B)
P4
TIOCB1(P1C)
R5
TXDO(P1D)
T4
RXD0(P1E)
N4
PO0
P5
PO1
R6
PO2
T5
PO3
N5
PO4
M5
PO5
M6
XFCE2(P06)
T6
XFCE3(P07)
P6
Vdd1
N6
Vss
R7
Vdd2
M7
XFWE
N7
XFRE
T7
XALE
P7
XCLE
T8
XFCE1(P1F)
R8
XFCE0
M8
XFWP
N8
XFBSY
P8
FD0
R9
FD1
T9
FD2
P9
FD3
N9
FD4
M9
FD5
T10
FD6
R10
FD7
P10
Vdd1
N10
Vss
M10
Vdd2
N1
1
SDWP
T1
1
SDCD
R1
1
SDCMD
P1
1
SDCLK
M1
1
SDAT1
T12
SDAT2
N12
SDAT3
R12
SDAT4
P12
VDDRTC
P13
VSSRTC
R13
XOUT32K
T13
XIN32K
R14
VDET
T14
RTCINT
T15
BACKUPB
R15
EXTINT0(P21)
T16
EXTINT1(P22)
P15
EXTINT2(P23)
R16
EXTINT3(P24)
P14
EXTINT4(P25)
N15
EXTINT5(P26)
N13
EXTINT6(P27)
P16
EXA1(A0)
N14
NCE
M12
VSSF
N16
DOUT
M15
DIN
M13
NRD(N0E)
M14
EXDO(DQ0)
L12
BCK
M16
EXD8(DQ8)
L15
VDD1
L13
EXD1(DQ1)
L14
VSS
L16
EXD9(DQ9)
K15
VDD2
K12
EXD2(DQ2)
K13
LRCK(P12)
K16
EXD10(DQ10)
K14
MCLK(P13)
J15
EXD3(DQ3)
J12
SCL(P28)
J16
SDA(P29)
J13
EXD1
1(DQ1
1)
J14
TXD2(P2C)
H13
RXD2(P2D)
H15
VDDF
H16
EXD4(DQ4)
H12
EXD12(DQ12)
L3
SDI0
P2
SCK1(P14)
M2
EXA6(A5)
N3
EXA2(A1)
M1
SDO0
P1
EXA3(A2)
J5
EXA7(A6)
N2
Vdd2
K4
EXA8(A7)
N1
EXA4(A3)
L1
SCK0
M3
Vss
L2
EXTFIQ(P2F)
K5
EXA5(A4)
K3
EXA18(A17)
L4
Vdd1
H14
VDD1
G15
EXD5(DQ5)
G16
VSS
G14
EXD13(DQ13)
G13
VDD2
F15
EXD6(DQ6)
F16
EXD14(DQ14)
F14
EXD7(DQ7)
G12
EXD15(DQ15)
E16
VSSF
E15
EXA17(A16)
D16
AV
D
D
PL
L1
D15
AVSSPLL1
E14
VCNT1
F13
VDDXT
C16
VSSXT
C15
XIN1
D14
XOUT1
C14
VSS
B16
XIN2
B15
XOUT2
A13
VDD1
A12
AVDDPLL2
B1
1
AVSSPLL2
A1
1
VCNT2
B10
AVSSDAMP
C10
ROUT
D10
AVDDDAMP
A10
AVDDDAMP
B9
LOUT
C9
AVSSDAMP
D9
AVDDPHI1
E9
AVSSPHY1
B8
AVSSPHY2
A9
RREF
C8
AVSSPHY2
D8
AVDDPHY2
B7
AVDDPHY2
A8
AVSSPHY2
C7
AVSSPHY2
A7
AVSSPHY2
E8
AVDDPHY2
D7
DP
E7
DM
A6
AVSSPHY2
B6
AVDDPHY2
C6
AVDDADC
D6
AN0
A5
AN1
E6
AN2
B5
AN3
C5
AN4
A4
AN5
D5
AN6
B4
AN7
C4
AN8
A3
AN9
B3
AVSSADC
A2
A14
A15
A16
B12
B13
B14
C1
1
C12
C13
D1
1
D12
D13
E10
E1
1
E12
E13
F12
1M
R5014
8p
C5007
0
R5012
12MHz
X5000
8p
C5008
DM
DP
DGND
SDA
CPU_VDD_3.1
CPU_VDD_1.0
0.1u
C5005
0.1u
C501
1
KEY_AD0
KEY_AD1
BATT_LEVEL
HOLD
0.1u
C5002
0.1u
C5000
SCK0
LED_G
LED_R
100k
R5034
BACKLIGHT
SP_SHDN
SP/HP_SEL
CPU_ROUT
CPU_LOUT
LRCK
BCK
DATA
SCL
KEY_WAKEUP
MIC_INSERT
HP_INSERT
MUTE
CHARGE_ON
AUDIO_POWER_ON
CPU_POWER_ON
A[0-19]
1M
R5000
LCD_A0
D[0-15]
1M
R5021
1M
R5018
NWRENWRL
IC5000
PST8209UL
1
2
3 4
100k
R5039
47k
R5038
CPU_32K
470k
R5030
DPC
BATT_CHARGE_LEVEL
RES
22k
R5011
DGND
0.1u
C5021
0.1u
C5027
0.1u
C5022
0.1u
C5025
0.1u
C5032
10
R5020
470
R5028
470
R5024
10
R5025
150
R5006
0.5%
150
R5017
0.5%
0.1u
C5012
680
R5003
0.5%
R5008
470k
JL5012
PST8227UL
IC5002
1
2
3 4
470k
R5040
1M
R5041
SDI0
SDO0
CPU_PLL2_2.8
JL5015
JL5018
JL5019
JL5020
0.1u
C5016
LSK3541FS8T2L
Q5002
2
3
AIRQ
470k
R5048
C5004
0.1u
0.1u
C5033
C5001
1u
CS2
CS0
CS3
0.1u
C5034
VBUS
FM_INT
4V
220u
C5003
JL5027
JL5028
JL5029
JL5030
LSK3541FS8T2L
Q5004
1
2
470k
R5066
CPU_V
BATT_LEVEL_MEASURE
470k
R5070
DAMP_SEL
100k
R5071
0
R5072
FM_POWER_ON
0
R5075
DX/LO
RB5001
470kX4
FL5001
TH5000
0.1u
C5009
100k
R5002
0.5%
LSK3541FS8T2L
Q5001
1
2
3
CHARGE_MEASURE_ON
SDO1
SDI1
SCK1
JL5006
JL5007
JL5008
JL5009
JL5010
JL2011
JL5013
JL5014
2SJ0674G0LS0
Q5005
XC6213B152GR
IC5003
1
VOUT
2
VSS
3 CE
4 VIN
UNREG_2.4
DGND
(CPU_DAMP_GND)
LCD_RESET
0.1u
C5035
DOUT
10
R5026
10p
C5037
1p
C5038
220nH
L5002
JL5025
CPU_VDD_3.1
RD
FD[0-7]
NAND_CNT
A[18]
A[17]
A[16]
A[14]
A[13]
A[12]
A[1
1]
A[10]
A[9]
A[8]
A[7]
A[6]
A[5]
A[4]
A[3]
A[2]
A[1]
A[0]
A[15]
A[19]
D[14]
D[13]
D[12]
D[1
1]
D[10]
D[9]
D[8]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
FD[7]
FD[6]
FD[5]
FD[4]
FD[3]
FD[2]
FD[1]
FD[0]
R/B
TCK
RT
C
K
TDI
TMS
TDO
WE
RE
ALE
CLE
TRST
RES
VBUS_INT
TRST
TDI
TMS
TCK
RTCK
TDO
CE0
WP
CE1
D[7]
D[15]
RES
TXD
RXD
VSS
VOUT
VIN
NC
JTAG
VIN
VOUT
VSS
NC
MAIN BOARD
(1/3)
SYSTEM CONTROL,D/A CONVERTER
IC5001
IC5003
REG
IC5000
RESET
IC5002
RESET
CSP(CHIP SIDE PACKAGE)
VBUS DETECT
HOLD DETECT
AIRQ SWITCH
CHARGE DETECT
(Page 21)
(Page 20)
(Page 21)
(Page 20)
(Page 21)
(Page 20)
When IC5001 on the Main board is damaged, exchange the
new Main board for the Main board which IC damaged.
