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HCD-VZ10
56
56
7-29. IC BLOCK DIAGRAMS
2
3
1
5
OPIN2 +
6
OPIN2 –
7
OPOUT2
8
GND
9
STBY1
4
BIAS IN
OPIN1 +
OPIN1 –
OPOUT1
11
12
13
14
10
PowVcc1
VO2 (–)
VO2 (+)
VO1 (–)
VO1 (+)
OPIN3 +
OPIN3 –
OPOUT3
GND
STBY2
PreVcc
OPIN4 +
OPIN4 –
OPOUT4
PowVcc2
VO3 (–)
VO3 (+)
VO4 (–)
VO4 (+)
Vcc
STAND BY
CH1 2 3
Level
Shift
Level
Shift
Level
Shift
Vcc
STAND BY
CH4
Vcc
Level
Shift
27
26
28
24
23
22
21
20
25
18
17
16
15
19
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
20k
10k
10k
10k
10k
10k
10k
10k
10k
10k
6
5
1
2
3
4
7
8
14
N.C
GND
PHASE
DELAY
N.C
N.C
FREQUENCY
CHARACTERISTIC
COMPENSATION
VIDEO
OUTPUT
N.C
DIFFERENTIATION
INPUT
V+
CONTROL
N.C
DIFFERENTIATION
OUTPUT
11
VIDEO
INPUT
12
10
13
9
SECONDARY
DIFFERENTIATION
GAIN ADJ
LPF
LOWER
LIMITER
(1)
LOWER
LIMITER
(2)
SWITCH
CONTROL
CLAMP
SYNC
CHIP
6
5
7
8
TINT
GND
BGP
V OUT
V+
6
5
1
2
3
4
7
8
14
15
16 VCC1
OUTA1
OUTA2
VCC2
MIXOUT1
MIXOUT2
N.C
OUTB
MUTEA
INA
GND
GND
GND
N.C
INB
MUTEB
11
12
10
13
9
75
Ω
6dB
75
Ω
6dB
20k
Chroma Mute
75
Ω
6dB
Mute
2
3
14
1
f04
13 f05
12 f06
11 REC
LEVEL
10 VCC
15 f03
5
REC
NF
6
REC
IN
7
RESET
C
8
BIAS
C
9
GND1
4
16 f02
17 f01
18 RESET
R02
P01
LINE
NF
LINE
IN
REFFERENCE
CURRENT
BPF
DET
BPF
DET
BPF
DET
BPF
DET
DET
RESET
Bias
REFFERENCE
CURRENT
DET
DET
BPF
BPF
OSCILLATOR
1/2 VCC
AUTO
RESET
LPF1
MAIN
CONTROL
A/D
20KBIT
SRAM
LPF2
D/A
2
3
4
5
6
7
8
9
10
11
15
14
13
12
CLOCK
RESET
MO
MI
D1
DO0
DO1
VCC
16
NC
CLOCK
REF
OP2IN
OP2OUT
LPF2IN
LPF2OUT
LPF1IN
1
NC
LPF1OUT
OP1OUT
OP1IN
CC1
CC2
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
On/Off
CONT2
CONT3
GND
HPFC
VREF
L-IN
R-IN
R-OUT
L-OUT
Vcc
NC
LPFC
ACG
GUR
GLR
ANALOG
SURROUND
VREF
+
+
IC303 NJM2209M-TE2 (VIDEO BOARD)
IC302 NJM2255M-TE2 (VIDEO BOARD)
IC304 BA7665FS-E2 (VIDEO BOARD)
w w w . x i a o y u 1 6 3 . c o m
Q Q 3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
TEL 13942296513 QQ 376315150 892498299