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HCD-MD595
52
52
6-2.
BLOCK DIAGRAMS – D/A, A/D CONVERTER Section –
7
30
8
15
93
8
26
17
11
12
34
91
13
19
18
53
52
22
32
31
90
89
39
38
5
3
115
36
37
22
69
54
55
16
15
RESET SWITCH
Q1103
MOTOR
DRIVE
CLOSE
OPEN
S1
CD TRAY OPEN/CLOSE
DETECT
5
6
2
10
LOADING
MOTOR DRIVE
IC1102
M
M
M201
(LOADING)
DIGITAL SIGNAL
SELECT SWITCH
IC1008
OPTICAL
RECEIVER
IC121
DIGITAL
OPTICAL IN
IEC958
DECODER
MUTING
Q1103, 1104
DATA IN/OUT
INTERFACE
DIGITAL
INTERFACE
DECIMATION
FILTER
CLOCK AND
TIMING CIRCUIT
AUDIO FEATURE
PROCESSOR
INTERPOLATOR
NOISE SHAPER
D/A
CONVERTER
BLOCK
12
13
29
18
22
1
CD MECHANISM CONTROLLER
IC1101
DC-
CANCELLATION
FILTER
A/D
CONVERTER
BLOCK
11
12
33
37
116
9
118
10
124
13
21
1
3
8
7
CLOCK CONTROL
A/D CONVERTER
IC1005
122
–
199, 113
–
102
100
–
94, 92, 85
–
77, 73
25
–
18, 8
–
1, 48, 17, 16
29, 31, 33, 35, 38, 40, 42, 44,
30, 32, 34, 36, 39, 41, 43, 45
63
65
90
26
28
11
14
20
19
RESET SIGNAL
GENERATOR
IC941
RESET SWITCH
Q931
B.UP +3.3V
B
(Page 51)
C
(Page 51)
D
(Page 51)
A
(Page 51)
E
(Page 54)
F
(Page 53)
G
(Page 53)
H
(Page 53)
K
(Page 54)
D/A CONVERTER
IC1006
MD MECHANISM
CONTROLLER
IC1001 (2/2)
FLASH
MEMORY
IC1002
R-CH
R-CH
X101
16MHz
DATA
CLK
SUBQ
SQCLK
XLT
SENSE
SCOR
LDON
X4
CTRL1
SPINDLE MUTE
BDRST
BDPWR
X1
X2
CD-DATA
CD-CLK
SQDATA
SQCK
X-LAT
SENS
SCOR
LDON
X1 – X4
X1 – X2
SPDL MUTE
RST
DOUT
AMUTE
AC-OUT
RESET
IN-SW
OUT-SW
I2CHELP
I2CHELP
I2CCLK
I2CDAT
LOD-POS
LOD-NEG
FIN
RIN
OUT1
OUT2
SPDIF1
SPDIF0
SLICER-
SEL
SLSEL
OPTSEL
LOCK
LOCK
MUTE
I2SBCKOUT
I2SLRCKOUT
BCK
WS
CLKOUT
VOUTL
VOUTR
RESET
BCK
LRCK
DAT AO
VINL
VINR
SCLK
PWON
IICDATA
IICCLK
IICHELP
OPTSEL
SLSEL
LOCK
MUTE
P.DOWN
I2CBUSY
I2CCLK
I2CDAT
XIN
CS0
OE
WE
WP
XOUT
RESET
OE
WE
WP
CE
DALOCK
DARST
ADPDWN
SLICERSEL
OPTSEL
D0
–
D15
DQ0
–
DQ15
A0
–
A18
A0
–
A18
X1001
10MHz
•
SIGNAL PATH
•
R-ch is omitted due to same as L-ch.
: CD PLAY
: MD PLAY
: MD REC
: OPTICAL IN
LIN
LOUT
P.DOWN
DADTI
BCK, LRCK
DOUT
DIN0
BDPWR
IICDATA, IICCLK
IICHELP
05
CD BLOCK
(BU-21BD53)
OP ASSY
(A-MAX. 2)