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• Abbreviation
EFM : Eight to Fourteen Modulation
PLL : Phase Locked Loop
Pin No.
Pin Name
I/O
Function
TE
CE
RFDC
ADIO
AVSS0
IGEN
AVDD0
ASYO
ASYI
BIAS
RFAC
AVSS3
CLTV
FILO
FILI
PCO
AVDD3
VSS
VDD
DOUT
LRCK
PCMD
BCK
EMPH
XVDD
XTAI
XTAO
XVSS
AVDD1
AOUT1
AIN1
LOUT1
AVSS1
AVSS2
LOUT2
AIN2
AOUT2
AVDD2
RMUT
LMUT
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
I
I
I
O
—
I
—
O
I
I
I
—
I
O
I
O
—
—
—
O
O
O
O
O
—
I
O
—
—
O
I
O
—
—
O
I
O
—
O
O
Tracking error signal input
Center servo analog input
RF signal input
Test pin (Not used)
Analog ground
Stabilized current input for operational amplifiers
Analog power supply
EFM full swing output
EFM asymmetry comparate voltage input
Asymmetry circuit constant current input
EFM signal input
Analog ground
Control voltage input for master VCO1
Filter output for master PLL
Filter input for master PLL
Charge-pump output for master PLL
Analog power supply
Digital ground
Digital power supply
Digital-out output pin
D/A interface LR clock output (ƒ = Fs) (Not used)
D/A interface serial data output (Not used)
D/A interface bit clock output (Not used)
Playback disc output in emphasis mode (Not used)
Power supply for master clock
X'tal oscillator circuit input (16.9344MHz)
X'tal oscillator circuit output (16.9344MHz)
Ground for master clock
Analog power supply
L-ch analog output
L-ch operational amplifiers input
L-ch line output
Analog ground
Analog ground
R-ch line output
R-ch operational amplifiers input
R-ch analog output
Analog power supply
R-ch “0” detection flag output (Not used)
L-ch “0” detection flag output (Not used)
Summary of Contents for HCD-J3MD
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