61
HCD-GNX780/GNX880
Pin No.
Pin Name
I/O
Description
1
XRST
O
Reset signal output to CXD3059AR (“L”: reset)
2
CD-DATA
O
Serial data output to CXD3059AR
3
XLAT
O
Serial data latch signal output to CXD3059AR
4
SIRCS
I
Remote control signal input
5
MP3 DATA OUT
O
Serial data output to TC94A34FG
6
MP3 DATA IN
I
Serial data input from TC94A34FG
7
MP3 CLK
O
Serial data transfer clock output to TC94A34FG
8
BYTE
I
Not used (Connected to ground)
9
CNVSS
–
Ground at test (Pull down)
10
XC-IN
I
Sub system clock input (32.768KHz)
11
XC-OUT
O
Sub system clock output (32.768KHz)
12
RESET
I
System reset signal input
13
X-OUT
O
Main system clock output (5MHz)
14
VSS
–
Ground terminal
15
X-IN
I
Main system clock input (5MHz)
16
VCC
–
Power supply terminal (+3.3V)
17
NMI
I
Non-maskable interrupt input (Not used) (Pull up with resistor)
18
CD-CLK
O
Serial data transfer clock output to CXD3059AR
19
SCOR
I
Sub code sync (S0+S1) detection signal input from CXD3059AR
20
AC-CUT
I
AC off detection signal input (“L”: AC cut detected)
21
SENS
I
Internal status detection monitor input from CXD3059AR
22
MP3 RST
O
Reset signal output to TC94A34FG
23
MP3 CS
O
Chip select signal output to TC94A34FG (“L”: enable)
24
MP3 LP
O
Latch pulse output to TC94A34FG (“L”: enable)
25
MP3 ACK
I
Acknowledgement signal input from TC94A34FG (“L”: acknowledged)
26
MP3 REQ
I
Request signal input to TC94A34FG
27
MP3 STB
O
Standby mode signal output to TC94A34FG (“L”: standby mode)
28
XTCN
O
Oscillation on/off control signal output to CXD3059AR (“H”: on)
29
IIC-CLK
I/O
IIC bus serial clock input/output
30
IIC-DATA
I/O
IIC bus serial data input/output
31
VMUTE
O
CDG video signal muting on/off control signal output (“H”: muting on)
32
CD POWER
O
Power on/off control signal output (“H”: power on)
33
CDG DET
I
CDG disc detection signal input (“H”: CDG disc detected)
34
EFFECTOR-SELECT
O
Effector circuitry bypass control signal output (“L”: bypass)
35
CDG RST
O
Reset signal output to the CDG decoder (“L”: reset)
36
EFFECTOR-S0
O
Effector circuitry delay time selection bit 0 output
37
CD MUTE
O
CD analog signal muting on/off control signal output “H”: muting on)
38
OPEN SW
I
Eject detection signal input from CD mechanism deck
39
TBL-SENS
I
Disc tray position detection signal input from CD mechanism deck
40
E-3
I
Disc tray status detection signal input from CD mechanism deck
41
E-2
I
Disc tray status detection signal input from CD mechanism deck
42
E-1
I
Disc tray status detection signal input from CD mechanism deck
43
TM-F
O
Table motor control signal output
44
TM-R
O
Table motor control signal output
45
LMF
O
Table loading motor control signal output
46
LMR
O
Table loading motor control signal output
47
NO USE
I
Not used
48
A-HALF
I
Deck A cassette detection signal input (“H”: Cassette detected)
49
EFFECTOR-S1
O
Effector circuitry delay time selection bit 1 output
• IC401 M30622MEP-A75FPUO SYSTEM CONTROL (MAIN BOARD)
Ver. 1.1
