52
HCD-GN800
Pin No.
54
55
56
57
58
59
60
61
62
63
64
I/O
I
I
–
O
I
–
O
–
I
O
–
Pin Name
BOOT/IO6
TXO/IO7
VSSP
PDO
VCOI
VDDP
CKO
VDDX
XI
XO
VSSX
Description
Terminal for test/SUBQ interface frame sync input (fixed at “L”)
Flag signal input 2/SUBQ interface block sync input (fixed at “L”)
Ground for VCO circuit
PLL phase error detection signal output
VCO control voltage input
Power supply (2.5V) for VCO circuit
External clock output
Power supply (2.5V) for oscillation circuit
Resonator terminal (input)
Resonator terminal (output)
Ground for oscillation circuit
Summary of Contents for HCD-GN800
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