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– 4 –

ICX423AL

Absolute Maximum Ratings

Item

HIS, V

DD

, RD, V

OUT

, V

SS

 – GND

HIS, V

DD

, RD, V

OUT

, V

SS

 – SUB

Vertical clock input pins – GND

Vertical clock input pins – SUB

Substrate voltage SUB – GND

Supply voltage

Vertical clock input
voltage

Voltage difference between vertical clock input pins

Voltage difference between horizontal clock input pins

H

φ

1

, H

φ

2

 – V

φ

4

H

φ

1

, H

φ

2

, RG, V

GG

 – GND

H

φ

1

, H

φ

2

, RG, V

GG

 – SUB

V

L

 – SUB

V

φ

1

, V

φ

3

, HIS, V

DD

, RD, V

OUT

 – V

L

RG – V

L

V

φ

2

, V

φ

4

, V

GG

, V

SS

, H

φ

1

, H

φ

2

 – VL

Storage temperature

Operating temperature

 –0.3 to +55

 –0.3 to +20

  –55 to +10

  –15 to +20

      to +10

      to +15

      to +17

–17 to +17

–10 to +15

–55 to +10

–65 to +0.3

–0.3 to +30

–0.3 to +24

–0.3 to +20

–30 to +80

–10 to +60

V

V

V

V

V

V

V

V

V

V

V

V

V

V

°C

°C

1

Ratings

Unit

Remarks

1

27V (Max.) when clock width < 10µs, clock duty factor < 0.1%.

Output amplifier drain voltage

Reset drain voltage

Output amplifier gate voltage

Output amplifier source

Substrate voltage adjustment range

Substrate voltage adjustment precision

Reset gate clock voltage adjustment range

Reset gate clock voltage adjustment precision

Protective transistor bias

Horizontal register input source bias

Item

V

DD

V

RD

V

GG

V

SS

V

SUB

V

SUB

V

RGL

V

RGL

V

L

V

HIS

Symbol

14.7

14.7

3.8

9

–3

0

–3

–11

14.7

Min.

V

V

V

V

%

V

%

V

V

Unit

V

RD

 = V

DD

±5%

2

2

3

V

HIS

 = V

DD

Remarks

Typ.

Max.

15.0

15.0

4.2

–10.5

15.0

15.3

15.3

4.6

19

+3

3.0

+3

–10

15.3

Bias Conditions

Ground with 750

 resistor

Summary of Contents for E01X23A41

Page 1: ...realized This chip features a field period readout system and an electronic shutter with variable charge storage time This chip is compatible with the pins of the ICX083AL and has the same drive conditions Features High sensitivity 3 0dB compared with the ICX083AL Low smear 10 0dB compared with the ICX083AL High saturation signal 2 0dB compared with the ICX083AL High resolution and Low dark curren...

Page 2: ...er improve the quality and reliability of the Products however failure of a certain percentage of the Products is inevitable Therefore you should take sufficient care to ensure the safe design of your products such as component redundancy anti conflagration features and features to prevent mis operation in order to avoid accidents resulting in injury or death fire or other social damage as a resul...

Page 3: ...VDD Signal output Output amplifier gate bias Output amplifier source GND Reset drain Reset gate clock Protective transistor bias Horizontal register transfer clock Horizontal register transfer clock Horizontal register input source bias Description Pin No Symbol Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock Substrate overflow drain GND Vertical ...

Page 4: ...15 55 to 10 65 to 0 3 0 3 to 30 0 3 to 24 0 3 to 20 30 to 80 10 to 60 V V V V V V V V V V V V V V C C 1 Ratings Unit Remarks 1 27V Max when clock width 10µs clock duty factor 0 1 Output amplifier drain voltage Reset drain voltage Output amplifier gate voltage Output amplifier source Substrate voltage adjustment range Substrate voltage adjustment precision Reset gate clock voltage adjustment range ...

Page 5: ... P 14 0 Q 14 5 R 15 0 S 15 5 T 16 0 U 16 5 V 17 0 W 17 5 X 18 0 Y 18 5 Z 19 0 VRGL code Optimal setting 1 0 2 0 5 3 1 0 4 1 5 5 2 0 6 2 5 7 3 0 3 This must no exceed the VVL voltage of the vertical clock waveform 4 1 Current to each pin when 20V is applied to VDD RD VOUT VSS HIS and SUB pins while pins that are not tested are grounded 2 Current to each pin when 20V is applied sequentially to Vφ1 V...

Page 6: ...lock voltage Item VVT VVH1 VVH2 VVH3 VVH4 VVL1 VVL2 VVL3 VVL4 VφV VVH1 VVH2 VVH3 VVH VVH4 VVH VVHH VVHL VVLH VVLL VφH VHL VφRG VRGL VφSUB Symbol 14 5 0 6 8 9 0 5 0 5 6 0 3 5 6 0 0 27 0 Min 15 0 9 6 Typ 15 5 0 0 2 0 0 0 8 1 0 0 8 0 8 8 0 3 0 13 0 3 0 32 0 Max Unit 1 2 2 2 2 2 2 2 2 2 2 3 3 3 3 4 Waveform diagram VVH VVH1 VVH2 2 VVL VVL3 VVL4 2 VφV VVHn VVLn n 1 to 4 High level coupling High level c...

Page 7: ...R3 R4 RGND RφH Symbol Capacitance between vertical transfer clock and GND Capacitance between vertical transfer clocks Capacitance between horizontal transfer clock and GND Capacitance between horizontal transfer clocks Capacitance between reset gate clock and GND Capacitance between substrate clock and GND Vertical transfer clock series resistor Vertical transfer clock ground resistor Horizontal ...

Page 8: ...rm VVH VVH1 VVH2 2 VVL VVL3 VVL4 2 VφV VVHn VVLn n 1 to 4 100 90 10 0 tr tf 0V twh φM 2 φM VVT VVH1 VVHH VVHL VVH VVLH VVL1 VVLL VVHL VVHH VVL VVHH VVH VVLH VVLL VVL VVHL VVL3 VVHL VVH3 VVHH VVH2 VVHH VVHH VVHL VVHL VVH VVLH VVL2 VVLL VVL VVH VVL VVHL VVLH VVLL VVHL VVH4 VVHH VVHH VVL4 Vφ1 Vφ3 Vφ2 Vφ4 ...

Page 9: ...Typ Max Min Typ Max twl tr tf 2 3 11 1 5 2 5 62 6 1 3 20 5 38 13 1 8 0 74 62 1 20 5 38 51 0 5 0 1 0 1 15 0 01 0 01 2 0 19 0 5 0 5 0 1 0 1 15 0 01 0 01 2 0 19 0 5 Unit µs µs µs ns µs µs ns µs Remarks During readout During imaging During imaging When draining charge Item Readout clock Vertical transfer clock Horizontal transfer clock Reset gate clock Substrate clock Symbol VT Vφ1 Vφ2 Vφ3 Vφ4 Hφ Hφ1 ...

Page 10: ...g condition I Use a pattern box luminance 706cd m2 color temperature of 3200K halogen source as a subject Pattern for evaluation is not applicable Use a testing standard lens with CM500S t 1 00mm as an IR cut filter and image at F8 The luminous intensity to the sensor receiving surface at this point is defined as the standard sensitivity luminous intensity 2 Standard imaging condition II Image a l...

Page 11: ...he signal output and substitute the values into the following formula SH Vmax Vmin 350 100 5 Dark signal Measure the average value of the signal output Vdt mV with the device ambient temperature 60 C and the device in the light obstructed state using the horizontal idle transfer level as a reference 6 Dark signal shading After measuring 5 measure the maximum Vdmax mV and minimum Vdmin mV values of...

Page 12: ...200P 1M Vφ 4 Vφ 3 Vφ 2 Vφ 1 SUB GND V L NC GND V DD HIS Hφ 2 Hφ 1 V L RG RD GND V SS V GG V OUT 3 3 16V 39k 3 3 16V 100k 100 CCD OUT 100k 10k 47k 10 10V 0 1 10 10 100k 100k 1 16V 33k 91k 0 1 0 1 0 1 0 1 2 2 16V CXD1268M 33k 0 01 3 3 25V 3 3 16V 750 3 3k ICX423AL BOTTOM VIEW 39k 74AC04 A 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 11 12 13 14 15 16 17 18 19 20 ...

Page 13: ...acteristics excludes light source characteristics Sensor Readout Clock Timing Chart 1 0 0 9 0 8 0 7 0 6 0 5 0 4 0 3 0 2 0 1 0 500 600 700 800 900 1000 400 Wave Length nm Relative Response Unit µs Odd Field Even Field V1 V2 V3 V4 V1 V2 V3 V4 2 5 2 6 2 5 2 5 33 6 1 5 0 2 ...

Page 14: ... 14 ICX423AL Drive Timing Chart Vertical Sync FLD VD BLK HD V1 V2 V3 V4 CCD OUT 620 625 1 2 3 4 5 15 20 310 320 335 330 340 581 582 1 3 5 2 4 6 1 3 5 2 4 6 582 581 2 1 4 3 6 5 10 315 325 2 1 4 3 6 5 25 ...

Page 15: ... 15 ICX423AL Drive Timing Chart Horizontal Sync 745 750 1 3 5 10 20 30 40 1 2 3 5 10 20 22 1 2 3 1 2 3 10 20 752 HD BLK H1 H2 RG V1 V2 V3 V4 SUB ...

Page 16: ...t protection Image sensors are packed and delivered by taking care of protecting its glass plates from harmful dust and dirt Clean glass plates with the following operation as required and use them a Operate in clean environments around class 1000 is appropriate b Do not either touch glass plates by hand or have any object come in contact with glass surfaces Should dirt stick to a glass surface bl...

Page 17: ... the center of the reference hole and the elongated hole is the reference axis of vertical direction V 3 The straight line C which passes through the center of the reference hole at right angle to vertical reference line B is the reference axis of horizontal direction H 4 The bottom D is the height reference Two points are specified 5 The center of the effective image area specified relative to th...

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