DVMC-DA2
SECTION 2
BLOCK DIAGRAMS
2-1. OVERALL BLOCK DIAGRAM
2-1
2-2
IC401
BLOCKING
SHUFFLING
STILL FILTER
MEMORY FEATURE
DIGITAL EFFECT
TEST SIG.
ENCODER
34
25
33
43
44
72
73
48
46
LINE V
J802
J802
J802
J802
J802
S Y
S C
X101
40.5MHz
51
58
61
68
105
104
101
50
61
68
17
8
9
12
7
106
109
4
Y0-Y7
IC501
DCT/IDCT
ESTIMATION
QUANTIZE
VLC/VLD
FRAMING
ADSP
INTERLEAVE/
DEINTERLEAVE
90
|
93
90
|
83
V BUS
C0-C7
HD
11
LCKO
VD
AFCK
97
96
22
23
51
TRCK
FRRV
TRRV
SPCKO
X401
13.5MHz
IC102
VIDEO IN
S-VIDEO IN
AGC, AFC,
A-D CONV.
34
L
36
R
37
L
38
28
26
24
20
R
IC201
AUDIO I/O
IC001
LINE OUT
AMP
IC101
EVR
53
|
56
•
58
|
61
13
14
X501
24.576MHz
IC503
DV INTERFACE
6
|
9
L BUS
TPA+, TPA–, TPB+, TPB–
IC502
ECC/PTG
DESHUFFLING
ENCODE/DECODE
CONCEAL
TBC
38
|
48
71
|
74
•
77
|
80
5
|
12
45
|
42
79
TRCK
47
TRCK
26
84 85 86
27
•
29
|
32
•
34
|
37
IC601
MECHA
CONTROL
IC301
DC-DC
CONV.
26
|
33
•
35
|
37
SCK
74
SO
75
115 116 117
76 75 74
14 13
1 2
16 15
SI
SCK
SO
SI
SCK
SO
SCK
SO
SI
76
81 83 82
IC602
EEPROM
2 3 4
SCK
SO
SI
SCK
SO
SI
SCK
SO
SI
IC703
HI CONTROL
33 34 35
SCK STB
DATA STB
50
49
31
32
106
107
FRRV
TRRT
TRRV
AUDIO L IN
AUDIO R IN
AUDIO L OUT
AUDIO R OUT
7
VIDEO OUT
S-VIDEO OUT
12
15
S Y
S C
C
Y
LINE V
IC002
VIDEO
SWITCH
1
3
7
IC701
VDO SWITCH
RESET
6
5
7
IC704
SWITCH
12
9
13
14
10
11
IC202
A-D CONV.
D-A CONV.
27
31
25
29
LINE V
S Y
S C
Y
C
45
39
44
SCK
DATA
6
L
3
R
19
L
20
12
15
11
R
DATA TO SFD
DATA FROM SFD
SFD BCK
40
38
41
60
27
28
29
X701
20MHz
VDD
XRESET
IC702
LANC I/F
12
11
4
2
12
10
1
14
UNREG
EVER 5V
UNREG
EVER 5V AU
EVER 3V AOI
EVER 3V AU
2V
SW 5V
VFD 3V
A 3V
SW 3V
POW ON
DD 34 ON
LANC IN
LANC OUT
XLANC ON
KEY AD1, KEY AD2
ERR LED, ANALOG LED, DV LED, MS LED
DD 2 ON
DD PWR ON
30
LANC JACK IN
DV IN/OUT
CN801
DC IN 6V
J301
LANC JACK
J801
80
|
83
94
•
95
9
•
10
3
|
6
2
4
3
9
•
10
3
|
6
ANALOG IN LED
DV IN LED
PROTECT LED
D901-D903
ANALOG IN SW
DV IN SW
POWER SW
S901, S902, S905
SWX-22 BOARD
JK-02 BOARD
IFX-52 BOARD
T BUS
MC BUS
108
2
4
3
(SEE PAGE 3-9 ~ 3-26)
(SEE PAGE 3-2)
(SEE PAGE 3-2)
