55
CX-JV77
Pin No.
Pin Name
I/O
Description
67
IVS4
—
Ground terminal (for I/O)
68
DRCAS
O
Column address strobe signal output to the D-RAM
69
LVD4
—
Digital power supply terminal (+2.5V) (for AV decoder block)
70
DRCK
O
Clock signal output to the D-RAM
71
IVD5
—
Power supply terminal (+3.3V) (for I/O)
72
DRRAS
O
Row address strobe signal output to the D-RAM
73
DRWEL
O
Write enable signal output to the D-RAM
74
NVOEL
O
Chip select signal output to the D-RAM
75
LVS4
—
Digital ground terminal (for AV decoder block)
76
DRBS
O
Bank select signal output to the D-RAM
77, 78
DRDQM0,
DRDQM1
O
Mask control signal output to the D-RAM
79
IVS5
—
Ground terminal (for I/O)
80
NC
—
Not used
81
SYSRST
I
Reset signal input from the system controller “L”: reset
82
IRDIN
I
IR data input terminal Not used
83
NC
—
Not used
84
VDD1
—
Digital power supply terminal (+2.5V) (for CD-DSP block)
85
V16M
O
Wide-band EFM PLL VCO2 oscillation output terminal Not used
86
DOUT
O
Digital audio signal output terminal Not used
87
L CDLRCK
I
L/R sampling clock signal (44.1 kHz) input terminal
88
LRCK
O
L/R sampling clock signal (44.1 kHz) output terminal
89
VSS1
—
Digital ground terminal
90
L CDDATA
I
Serial data input terminal
91
PCMD
O
Serial data output terminal
92
L CDBCK
I
Bit clock signal (2.8224 MHz) input terminal
93
BCK
O
Bit clock signal (2.8224 MHz) output terminal
94
EMPH
O
“L” is output when playback disc is emphasis off
“H” is output when playback disc is emphasis on Not used
95
L SQSO
I
Subcode-Q 80-bit, PCM peak and level data, CD text data input terminal
96
SQSO
O
Subcode-Q 80-bit, PCM peak and level data, CD text data output terminal
97
VDD2
—
Digital power supply terminal (+2.5V) (for CD-DSP block)
98
L SQCK
O
SQSO readout clock signal output terminal
99
SQCK
I
SQSO readout clock signal input terminal
100
SBSO
O
Subcode P to W serial data output terminal Not used
101
EXCK
I
SBSO readout clock signal input terminal Not used
102
DATA
I
Serial data input terminal
103
L DDAT
O
Serial data output terminal
104
VSS2
—
Digital ground terminal
105
L CDXRST
O
Reset signal output terminal “L”: reset
106
XRST
I
Reset signal input terminal “L”: reset
107
MUTE
I
Muting on/off control signal input terminal “H”: muting on Not used
108
L XLAT
O
Serial data latch pulse signal output terminal
109
XLAT
I
Serial data latch pulse signal input terminal
110
L DCLK
O
Serial data transfer clock signal output terminal
111
CLOK
I
Serial data transfer clock signal input terminal
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