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59
CX-JV1
Pin No.
Pin Name
I/O
Description
48
AOL–
O
Audio data (L-ch) output to the electrical volume
49, 50
MIC2, MIC1
I
MIC signal input terminal Not used
51
AGND
—
Ground terminal (analog system)
52
VREF
I
Not used
53
VCM
I
Not used
54
RSET
I
Not used
55
COMP
I
Not used
56, 57
VGND
—
Ground terminal (video analog system)
58
CDAC
O
Modulated chrominance output terminal Not used
59, 60
VVDD
—
Power supply terminal (+5V) (for video)
61
YDAC
O
Y luminance data bus terminal Not used
62, 63
VGND
—
Ground terminal (video analog system)
64
VDAC
O
Composite video signal output terminal
65
ACAP
I
Not used
66
VDD
—
Power supply terminal (+5V)
67
AUX06
O
Serial data latch pulse signal output to the digital signal processor
68
AUX05
O
Serial data latch pulse signal output to the digital signal processor and D/A converter
69
AUX04
O
Laser diode on/off control signal output to the RF amplifier “L”: laser diode on
70
AUX03
I/O
Not used
71
XOUT
O
System clock output terminal (27 MHz)
72
GND
—
Ground terminal
73
VDD
—
Power supply terminal (+5V)
74
XIN
I
System clock input terminal (27 MHz)
75
GND
—
Ground terminal
76
NC
—
Not used
77
GND
—
Ground terminal
78
VDD
—
Power supply terminal (+5V)
79
PCK
O
13.5 MHz pixel clock signal output to the video CD MPEG processor
80
PCK2
O
27 MHz pixel clock signal output to the video CD MPEG processor
81
DSCD7
I/O
Two-way data bus with the video CD MPEG processor Data input from the program ROM
82
HSYNC
O
Horizontal sync signal output to the video CD MPEG processor “L”: active
83
DSCD6
I/O
Two-way data bus with the video CD MPEG processor Data input from the program ROM
84
VSYNC
O
Vertical sync signal output to the video CD MPEG processor “L”: active
85
DSCD5
I/O
Two-way data bus with the video CD MPEG processor Data input from the program ROM
86 to 89
YUV7 to YUV4
I
YUV 8-bit video data bus input from the video CD MPEG processor
90
VDD
—
Power supply terminal (+5V)
91
GND
—
Ground terminal
92
YUV3
I
YUV 8-bit video data bus input from the video CD MPEG processor
93
DSCD4
I/O
Two-way data bus with the video CD MPEG processor Data input from the program ROM
94
YUV2
I
YUV 8-bit video data bus input from the video CD MPEG processor
95
DSCD3
I/O
Two-way data bus with the video CD MPEG processor Data input from the program ROM
96
YUV1
I
YUV 8-bit video data bus input from the video CD MPEG processor
97
DSCD2
I/O
Two-way data bus with the video CD MPEG processor Data input from the program ROM
98
YUV0
I
YUV 8-bit video data bus input from the video CD MPEG processor
99
DSCD1
I/O
Two-way data bus with the video CD MPEG processor Data input from the program ROM
100
GND
—
Ground terminal
Summary of Contents for CX-JV1
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Page 97: ...9 CX JV1 MEMO ...