Sony CA-702, Maintenance Manual

Page: 95 / 156

4-17
CA-702
CA-702P
IC
4
3
RD
1-C
1-CR
1-RD
1-CK
1-CK
1-Q
1-Q
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
2-C
2-CR
2-RD
2-CK
2-CK
2-Q
2-Q GND
V
DD
( + 2V to + 6V)
7
Q
6
Q
2
V
DD
1
C R
5
12
13
RD
9
Q
10
Q
14
V
DD
15
C R
11
OUTPUT PULSE WIDTH = k · C · R
4
3
RD
7
Q
6
Q
2 1
5
RETRIGGERABLE M. M. V
CR C
12
13
RD
9
Q
10
Q
14 15
11
CR C
0.74
0.72
0.70
0.68
0.66
0.64
0.62
k. OUTPUT PULSE WIDTH CONSTANT (TYPICAL)
2 3 4 5 6
V
DD
POWER SUPPLY VOLTAGE (VOLTS)
NON-RETRIGGERABLE M. M. V
RD
Q
Q
V
DD
V
DD
V
DD
RD
Q
Q
V
DD
V
DD
RD
Q
Q
V
DD
RD
Q
Q
V
DD
V
DD
V
DD
C-MOS DUAL RETRIGGERABLE / NON-RETRIGGERABLE MONOSTABLE
MULTIVIBRATOR
—TOP VIEW—
0
0
0
0
0
0
0
0
1
CONTROL INPUTS
12
13
2
1
5
3
X0
X1
Y0
Y1
Z0
Z1
6
EN
X
Y
Z
14
15
4
0
1
X
; LOW LEVEL
; HIGH LEVEL
; DON'T CARE
V
EE
* ; V
DD
_ V
EE
= + 3V to + 12V
7
V
EE
C
0
0
0
0
1
1
1
1
X
B
0
0
1
1
0
0
1
1
X
Y1
I/O
Y0
I/O
Z1
I/O
Z
I/O
Z0
I/O
EN
IN
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Y
I/O
X
I/O
X1
I/O
X0
I/O
A
IN
B
IN
C
IN
GND
V
DD
( + 2V to + 6V)
V
EE
*
OPEN
A
11
OPEN
B
10
OPEN
C
9
V
EE
< GND
A
0
1
0
1
0
1
0
1
X
SELECT
EN
ON CHANNEL
Z0
Z0
Z0
Z0
Z1
Z1
Z1
Z1
Y0
Y0
Y1
Y1
Y0
Y0
Y1
Y1
X0
X1
X0
X1
X0
X1
X0
X1
OPEN
C-MOS TRIPLE 2-CHANNEL ANALOG MULTIPLEXER/DEMULTIPLEXER
—TOP VIEW—
1
2
3
4
5
6
7
8
Y0
IN/OUT
Y2
IN/OUT
YC
IN/OUT
Y3
IN/OUT
Y1
IN/OUT
EN
IN
V
EE *
GND
16
15
14
13
12
11
10
9
V
DD
( + 2 to + 6V)
X2
IN/OUT
X1
IN/OUT
XC
IN/OUT
X0
IN/OUT
X3
IN/OUT
A
IN
B
IN
12
14
15
11
1
5
2
4
10
9
X0
X1
X2
X3
Y0
Y1
Y2
Y3
A
B
6 7
EN V
EE
OPEN
OPEN
CONTROL
INPUTS
EN B A
"ON"
CHANNEL
0
1
X
; LOW LEVEL
; HIGH LEVEL
; DON'T CARE
V
EE * ;
V
DD -
V
EE
= + 3 to + 12V
XC
YC
13
3
0
0
0
0
1
0
0
1
1
X
0
1
0
1
X
0
1
2
3
OPEN
C-MOS DUAL 4-CHANNEL ANALOG MULTIPLEXER/DEMULTIPLEXER
—TOP VIEW—
SN74LVC821APW-E05 (TI)FLAT PACKAGE
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
GND
V
DD
OE
D1
IN
D2
IN
D3
IN
D4
IN
D5
IN
D6
IN
D7
IN
D8
IN
D9
IN
D10
IN
Q1
OUT
Q2
OUT
Q3
OUT
Q4
OUT
Q5
OUT
Q6
OUT
Q7
OUT
Q8
OUT
Q9
OUT
Q10
OUT
CK
IN
FUNCTION TABLE (EACH FLIP-FLOP)
INPUTS OUTPUTS
Q OE
0
0
0
1
D
1
0
x
x
1
0
Q
0
HI-Z
0
1
x
HI-Z
CK
0
x
2
3
4
5
6
7
8
9
10
11
13
23
22
21
20
19
18
17
16
15
14
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Q10
OE
1
: LOW LEVEL
: HIGH LEVEL
: DON’T CARE
: HIGH IMPEDANCE
TYPE
74LVC
OTHER TYPES
V
DD
+ 2 to + 3.6 V
+
5 V
NOTE:
C-MOS 10-BIT BUS INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS
—TOP VIEW—
D
23
Q1
D
22
Q2
D
21
Q3
D
20
Q4
D
19
Q5
D
18
Q6
D
17
Q7
D
16
Q8
D
15
Q9
D
14
Q10
11
D10
10
D9
9
D8
8
D7
7
D6
6
D5
5
D4
4
D3
3
D2
2
D1
13
CK
1
OE
LOGIC DIAGRAM (POSITIVE LOGIC)
TC74HC4052AFS(EL) (TOSHIBA)FLAT PACKAGE
TC74HC4053AFS (TOSHIBA)FLAT PACKAGE
TC74HC4053AFS-EL
TC74HC4538AFS-EL (TOSHIBA)FLAT PACKAGE
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