Sony BRAVIA KDL-32V2000, Service Manual

Page: 49 / 100

A B C D E F G H I J K L M N
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~ BE Board Schematic Diagram [ Main Micro Processor & Video Processor ] Page 11/12 ~
MAIN_DIN
1
2
3
4
CN4701
+10.5V
+10.5V
GND
GND
R4702 XX
R4703 XX
R4706 XX
R4704 XX
R4705 XX
FB4701 XX
R4710 0
R4708
XX
R4707
XX
R4709 XX
SYS/SD_VIDEO
SD_VIDEO
UNREG10.5V
R4701
XX
C4700
XX
XX
C4701
XX
C4702
FB4700 XX
R4700
1K
RB4700
1K
RB4701
1K
2
1
4
3
6
5
8
7
R4715
XX
FE5/6.2/10.5V
S1_OFF
C4703
XX
DTT_MUTE
DTTLOG
R4714
XX
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2
3
4
5
6
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13
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15
16
17
18
19
20
CN4700
20P
M_RST
TV_REC_ON
RESET/DY0
GND
AC_DET/DY1
GND
U2_TX/DY2
GND
U_ACT/DY3
GDN
SPI_STATUS/DY4
GND
U_CE/DY5
GND
U_CLK/DY6
GND
U_DOUT/DY7
GND
U_DIN/DCLK
GND
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2
3
4
5
6
7
8
9
10
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CN4702
DT_MUTE
GND
DCLK
GND
DT_DVS
GND
DT_DHS
GND
DC7
GND
DC6
GND
DC5
GND
DC4
GND
DC3
GND
DC2
GND
DC1
GND
DC0
GND
DY7
GND
DY6
GND
DY5
GND
DY4
GND
DY3
GND
DY2
GND
DY1
GND
DY0
GND
DT_C_DY0
DT_C_DC4
DT_C_DC0
DT_C_CLK
DT_C_DY4
DT_C_HS
DT_C_VS
DTT_BUS_MOSI
DTT_BUS_MISO
DTT_BUS_SCK
DTT_BUS_INT
DTT_BUS_ST
DTT_BUS_CS
MIPS_RST_IN
POWER2
DTT_RST
D
Y
4_AEP
D
Y
5_AEP
D
Y
6_AEP
D
Y
7_AEP
DCLK_AEP
D
Y
0_AEP
D
Y
2_AEP
D
Y
3_AEP
D
Y
1_AEP
DT_C_DY1
DT_C_DY2
DT_C_DY3
DT_C_DY5
DT_C_DY6
DT_C_DY7
DT_C_DC1
DT_C_DC2
DT_C_DC3
DT_C_DC5
DT_C_DC6
DT_C_DC7
FROM F/E HD VIDEO(DIGITAL)
INPUT TO Trident
BUSMISO
BUS ST
BUS SCK
BUSMOSI
BUS CS
BUS INT
SYSTEM(J)/SD_VIDEO(UK)
FOR UK
TO F/E POWER(J&U/C)
BE
BE.-WAX2
11/12
COMPONENTS MARKED AS XX ARE NOT FITTED ON THIS MODEL
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