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AR-B1474 User

¡¦

s Guide

5-13

(3) D.O.C. Setting (SW1-8)

ON

1

2

3

4

5

6

OFF

7

8

Figure 5-14 SW1-8: D.O.C. Setting

Note:

There is 1 DIP switch located on the AR-B1474. It performs the followings:

SW1-1 & SW1-2 Set the base I/O port address
SW1-3 & SW1-4 Set the starting memory address
SW1-5, SW1-6 &
SW1-7

The function now is unavailable

SW1-8

Set the DiskOnChip only

5.5.2 Software Setting

We will attach the BU1474.EXE and 1474DOC.INI these two files, BU1474.EXE is the utility program, and the
1474DOC.INI is for D.O.C. BIOS. When user execute the two files for updating will show the message on the
screen as follows:

AR-B1474 Special SSD BIOS for DiskOnChip Version 1.5M (C) 1998 Acrosser
DOC Socket Service – Version 0.2
(C) Copyright 1992 – 1996, M-Systems Ltd.

TrueFFS – BIOS – Version 3.3.5 for DiskOnChip 2000 (V1.05)
Copyright (C) M – Systems, 1992 – 1997

Note:

If you want to use the D.O.C., and please contact technical engineer for the utility programs.

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Summary of Contents for 486DX

Page 1: ...AR B1474 INDUSTRIAL GRADE 486DX DX2 DX4 CPU CARD User s Guide Edition 3 1 Book Number AR B1474 99 B01 ...

Page 2: ......

Page 3: ... Connector CN2 3 4 3 2 5 Parallel Port Connector CN3 3 4 3 2 6 PC 104 Connector 3 5 3 2 7 CPU Setting 3 7 3 2 8 Memory Setting 3 9 3 2 9 LED Header J1 J2 J4 3 10 3 2 10 Keyboard Connector 3 10 3 2 11 External Speaker Header J3 3 11 3 2 12 Reset Header J7 3 11 3 2 13 Battery Setting 3 11 3 2 14 CRT Display Type Select JP13 3 11 4 INSTALLATION 4 1 4 1 OVERVIEW 4 1 4 2 UTILITY DISKETTE 4 2 4 3 WRITE ...

Page 4: ...CHIPSET SETUP 6 5 6 5 POWER MANAGEMENT 6 6 6 6 AUTO DETECT HARD DISKS 6 7 6 7 PASSWORD SETTING 6 7 6 7 1 Setting Password 6 7 6 7 2 Password Checking 6 7 6 8 LOAD DEFAULT SETTING 6 7 6 8 1 Auto Configuration with Optimal Setting 6 7 6 8 2 Auto Configuration with Fail Safe Setting 6 7 6 9 BIOS EXIT 6 8 6 9 1 Save Settings and Exit 6 8 6 9 2 Exit Without Saving 6 8 7 SPECIFICATIONS 7 1 8 PLACEMENT D...

Page 5: ...u have not already installed this AR B1474 refer to the Chapter 3 Setting Up the System in this guide Check the packing list make sure the accessories in the package AR B1474 diskette provides the newest information about the card Please refer to the README DOC file of the enclosed utility diskette It contains the modification and hardware software information and adding the description or modific...

Page 6: ...UTIONS Before removing the board from its anti static bag read this section about static electricity precautions Static electricity is a constant danger to computer systems The charge that can build up in your body may be more than sufficient to damage integrated circuits on any PC board It is therefore important to observe basic precautions whenever you use or handle computer components Although ...

Page 7: ...ovided on this CPU card It ensures that the system will not hang up if a program can not execute normally For diskless application the AR B1474 provides up to 3MB of bootable ROM FLASH or SRAM disk space by using 64K x 8 to 1M x 8 memory chips The AR B1474 is implemented with M1429 and M1431 chipset incorporate a memory controller parity generation and checking two 8237 DMA controllers two 8259 in...

Page 8: ...es please contact your Acrosser distributor immediately 1 3 FEATURES The system provides a number of special features that enhance its reliability ensure its availability and improve its expansion capabilities as well as its hardware structure l All in one designed 486DX DX2 DX4 CPU card l Support 3 3V 5V CPU with voltage regulator l Support ISA bus and PC 104 bus l Support 128KB to 512KB second l...

Page 9: ...A Controller 1 DMA Controller 2 Channel 0 Spare Channel 4 Cascade for controller 1 Channel 1 IBM SDLC Channel 5 Spare Channel 2 Diskette adapter Channel 6 Spare Channel 3 Spare Channel 7 Spare Table 2 1 DMA Channel Controller 2 2 KEYBOARD CONTROLLER The 8042 processor is programmed to support the serial keyboard serial interface The keyboard controller receives serial data from the keyboard checks...

Page 10: ...hich interrupt service routine to execute Following is the system information of interrupt levels IRQ8 Real time clock IRQ9 Rerouting to INT 0Ah from hardware IRQ2 IRQ10 Spare IRQ11 Spare IRQ12 Spare IRQ13 Math coprocessor IRQ14 Hard disk adapter IRQ15 Spare Watchdog Timer In Interrupt Level NMI CTRL1 IRQ 0 IRQ 1 IRQ 2 IRQ 3 IRQ 4 IRQ 5 IRQ 6 IRQ 7 CTRL2 Parity check Description Serial port 2 Seri...

Page 11: ...ssor 170 178 Fixed disk 1 1F0 1F8 Fixed disk 0 201 Game port 208 20A EMS register 0 210 213 SSD 214 215 Watchdog 218 21A EMS register 1 278 27F Parallel printer port 3 LPT 3 290 293 SSD 294 295 Watchdog 2E8 2EF Serial port 4 COM 4 2F8 2FF Serial port 2 COM 2 310 313 SSD 314 315 Watchdog 378 37F Parallel printer port 2 LPT 2 380 38F SDLC bisynchronous 2 390 393 SSD 394 395 Watchdog 3A0 3AF Bisynchr...

Page 12: ...D Status register D 0E Diagnostic status byte 0F Shutdown status byte 10 Diskette drive type byte drive A and B 11 Fixed disk type byte drive C 12 Fixed disk type byte drive D 13 Reserved 14 Equipment byte 15 Low base memory byte 16 High base memory byte 17 Low expansion memory byte 18 High expansion memory byte 19 2D Reserved 2E 2F 2 byte CMOS checksum 30 Low actual expansion memory byte 31 High ...

Page 13: ...t A23 SA8 Input Output B23 IRQ5 Input A24 SA7 Input Output B24 IRQ4 Input A25 SA6 Input Output B25 IRQ3 Input A26 SA5 Input Output B26 DACK2 Output A27 SA4 Input Output B27 TC Output A28 SA3 Input Output B28 BALE Output A29 SA2 Input Output B29 5V Power A30 SA1 Input Output B30 OSC Output A31 SA0 Input Output B31 GND Ground Table 2 4 ISA Bus Pin Assignment I O Pin Signal Name Input Output I O Pin ...

Page 14: ...ut Output The I O write signal is an active low signal which instructs the I O device to read data from the data bus SMEMW Output The System Memory Read is low while any of the low 1 mega bytes of memory are being used MEMR Input Output The Memory Read signal is low while any memory location is being read SMEMW Output The System Memory Write is low while any of the low 1 mega bytes of memory is be...

Page 15: ...al format in order of transmission and reception is a start bit followed by five to eight data bits a parity bit if programmed and one one and half five bit format only or two stop bits The ACEs are capable of handling divisors of 1 to 65535 and produce a 16x clock for driving the internal transmitter logic Provisions are also included to use this 16x clock to drive the receiver logic Also include...

Page 16: ...rol Register LCR Bit 0 Word Length Select Bit 0 WLS0 Bit 1 Word Length Select Bit 1 WLS1 WLS1 WLS0 Word Length 0 0 5 Bits 0 1 6 Bits 1 0 7 Bits 1 1 8 Bits Bit 2 Number of Stop Bit STB Bit 3 Parity Enable PEN Bit 4 Even Parity Select EPS Bit 5 Stick Parity Bit 6 Set Break Bit 7 Divisor Latch Access Bit DLAB 6 MODEM Control Register MCR Bit 0 Data Terminal Ready DTR Bit 1 Request to Send RTS Bit 2 O...

Page 17: ...it 5 Bit 5 Bit 13 Bit 6 Bit 6 Bit 14 Bit 7 Bit 7 Bit 15 Desired Baud Rate Divisor Used to Generate 16x Clock 300 384 600 192 1200 96 1800 64 2400 48 3600 32 4800 24 9600 12 14400 8 19200 6 28800 4 38400 3 57600 2 115200 1 Table 2 8 Serial Port Divisor Latch 2 5 PARALLEL PORT 1 Register Address Port Address Read Write Register base 0 Write Output data base 0 Read Input data base 1 Read Printer stat...

Page 18: ...means the printer has detected the end of the paper Bit 4 A 1 means the printer is selected Bit 3 A 0 means the printer has encountered an error condition 5 Printer Control Latch Printer Control Swapper The system microprocessor can read the contents of the printer control latch by reading the address of printer control swapper Bit definitions are as follows X X 1 2 3 4 5 6 7 0 STROBE AUTO FD XT I...

Page 19: ...n designed to withstand continuous operation in harsh environments The total on board memory for the AR B1474 can be configured from 1MB to 32MB by using all 72 pin type DRAM devices CN6 JP15 JP1 JP14 JP8 JP9 JP10 U17 U26 H16 JP3 H5 JP7 SW1 J5 P10 P8 P6 JP2 JP6 U13 J4 J3 P9 P7 P5 JP11 JP5 JP4 JP13 JP12 J2 J1 J6 J7 LED1 LED2 H19 H18 H4 J8 U18 U12 U8 CN3 DB2 CN1 CN2 H15 H7 H6 H14 CN5 U20 U27 CN4 1 S...

Page 20: ...m unit chassis The static discharges from your fingers can permanently damage electronic components 3 2 1 Serial Port 1 RS 485 Adapter Select JP3 JP11 JP3 and JP11 can be set independently JP3 selects COM A port and JP11 selects COM B port 1 2 3 JP3 COM A 1 2 3 Reserved for Acrosser s RS 485 adapter used only RS 232C Factory Preset Figure 3 2 JP3 RS 485 Adapter Select for COM A 1 2 3 JP11 COM B 1 ...

Page 21: ...nector Pin Signal Pin Signal 1 RESET 2 GROUND 3 DATA 7 4 DATA 8 5 DATA 6 6 DATA 9 7 DATA 5 8 DATA 10 9 DATA 4 10 DATA 11 11 DATA 3 12 DATA 12 13 DATA 2 14 DATA 13 15 DATA 1 16 DATA 14 17 DATA 0 18 DATA 15 19 GROUND 20 Not used 21 Not Used 22 GROUND 23 IOW 24 GROUND 25 IOR 26 GROUND 27 Not Used 28 BALE 29 Not Used 30 GROUND 31 IRQ14 32 IOCS16 33 SA 1 34 Not used 35 SA 0 36 SA 2 37 CS 0 38 CS 1 39 H...

Page 22: ...signment 3 2 5 Parallel Port Connector CN3 To use the parallel port an adapter cable has been connected to the CN3 26 pin header type connector This adapter cable is included in your AR B1474 package The connector for the parallel port is a 25 pin D type female connector 1 2 1 14 13 25 D Type Connector Parallel Port Connector 25 26 Figure 3 8 CN3 Parallel Port Connector CN3 DB 25 Signal CN3 DB 25 ...

Page 23: ...1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 IRQ6 IRQ5 IRQ4 IRQ3 DACK2 TC BALE 5 VDC OSC GND GND CN6 1 2 Figure 3 9 CN6 64 Pin PC 104 Connector Bus A B 2 40 Pin PC 104 Connector Bus C D CN4 1 2 39 40 40 Pin PC 104 Connector C D GND SBHE LA23 LA22 LA21 LA20 LA19 LA18 LA17 MEMR MEMW SD8 SD9 SD10 SD11 SD12 SD13 SD14 SD15 KEY C1 ...

Page 24: ...Input Output The I O write signal is an active low signal which instructs the I O device to read data from the data bus SMEMR Output The System Memory Read is low while any of the low 1mega bytes of memory are being used MEMR Input Output The Memory Read signal is low while any memory location is being read SMEMW Output The System Memory Write is low while any of the low 1mega bytes of memory is b...

Page 25: ...g The AR B1474 accepts many types of microprocessor such as INTEL AMD CYRIX 486DX DX2 DX4 All of these CPUs include an integer processing unit floating point processing unit memory management unit and cache They can give a two to ten fold performance improvement in speed over the 386 processor depending on the clock speeds used and specific application Like the 386 processor the 486 processor incl...

Page 26: ...the CPU clock 2X 1 2 3 1X 1 2 3 1 2 3 JP9 1 2 3 Factory Preset Figure 3 14 JP9 CPU System Clock Multiplier Select Pin Definition 1 2 A 3 4 B 5 6 C 1 2 3 4 5 6 B A C Table 3 5 JP6 CPU Base Clock JP6 CPU Type CPU Clock Base Clock JP9 A B C Note DX 25 DX2 50 DX4 75 25MHz 50MHz 1X Close Open Open DX 33 DX2 66 DX4 100 5X86 133 33 3MHz 33 3MHz 1X Close Open Close Factory Preset DX 40 DX2 80 DX4 120 40MH...

Page 27: ... are needed Four 128Kx8 SRAM chips will provide 512KB cache 256KB 1 2 3 4 512KB Factory Preset 128KB 1 2 3 4 1 2 3 4 JP8 JP8 JP8 Figure 3 15 JP8 Cache RAM Size Select 3 DRAM Configuration There is one 32 bit memory bank on the AR B1474 card It can be one side or double side SIMM Single Line Memory Modules which is designed to accommodate 256Kx36 bit to 8Mx36 bit SIMMs This provides the user with u...

Page 28: ...d Connector CN5 CN5 is a 6 pin Mini DIN connector This keyboard connector is PS 2 type keyboard compatible An PC AT compatible keyboard can be used by connecting the provided adapter cable CN5 and keyboard 1 DATA 3 GND 2 Not Used 6 Not Used 4 VCC 1 2 3 4 5 6 5 CLOCK CN5 Front View Figure 3 19 CN5 Keyboard Connector 2 AUX Keyboard Connector J8 A PC AT compatible keyboard can be used by connected th...

Page 29: ...y Default Setting Non chargeable Rechargeable 1 2 3 1 2 3 Figure 3 23 JP4 Battery Charger Select 2 External Battery Connector J6 J6 allows users to connect an external 4 5 to 6 VDC battery to the AR B1474 if the on board battery is empty Only the SRAM disk will sink the battery current If no SRAM chip will be used no battery is needed The battery charger on AR B1474 does not source charge current ...

Page 30: ......

Page 31: ...tep 5 Make sure that the power supply connected to your passive CPU board is turned off Step 6 Plug the CPU card into a free AT bus slot or PICMG slot on the backplane and secure it in place with a screw to the system chassis Step 7 Connect all necessary cables Make sure that the FDC HDC serial and parallel cables are connected to pin 1 of the related connector Step 8 Connect the hard disk floppy ...

Page 32: ...ithout error this option instructs PGM1474 to verify the contents of FLASH memory chips with the current ROM pattern files Program Memory If there are no mistakes in your ROM pattern file then this menu option will erase FLASH memory write the current ROM pattern files onto FLASH memory and verify data that was just written to FLASH memory using the ROM pattern files Memory Type Mfr Before you pro...

Page 33: ...y diskette is a program that converts the files you list in the PGF and convert them into ROM pattern file The RFG will determine how many EPROMs are needed and generate the same number of ROM pattern files These ROM pattern files are named with the name assigned by the ROM_NAME in the PGF and the extension names are R01 R02 etc To generate ROM pattern files The ROM File Generator main menu will b...

Page 34: ...w to create ROM pattern files correctly The PGF is an ASCII text file that can be created by using any text editor word processor or DOS COPY CON command The PGF lists what files will be copied and if DOS is going to be copied This file can have any DOS filename but the extension name must be PGF For example followings are valid filenames RFGDEMO PGF MYRFG PGF MSDOS PGF An examples of the PGF file...

Page 35: ... data on your FLASH SRAM disk you can use the software write protect instead of hardware write protect The software write protect function is enabled or disabled by writing a data to an I O port 4 3 3 Enable the Software Write Protect Writes data 08h to the base port 2 address Example 1 in assembly language MOV DX 212H If the AR B1474 s base I O address is 210H MOV AL 08H Enable byte 08h OUT DX AL...

Page 36: ... is a circuit that may be used from your program software to detect crashes or hang ups Whenever the watchdog timer is enabled the LED will blink to indicate that the timer is counting The watchdog timer is automatically disabled after reset Once you have enabled the watchdog timer your program must trigger the watchdog timer every time before it times out After you trigger the watchdog timer it w...

Page 37: ...enable the watchdog timer and set the time out period at 24 seconds 1000 REM Points to command register 1010 WD_REG BASE_PORT 4 1020 REM Timer factor 84H or 0C4H 1030 TIMER_FACTOR H84 1040 REM Output factor to watchdog register 1050 OUT WD_REG TIMER_FACTOR etc 4 4 3 Watchdog Timer Trigger After you enable the watchdog timer your program must write the same factor as enabling to the watchdog regist...

Page 38: ......

Page 39: ...ld format FLASH disk and copy files onto FLASH disk just like using a normal floppy disk You could use all of the related DOS command such as COPY DEL etc to update files on the 5V FLASH disk The write protect function allows you to prevent your data on small page 5V FLASH or SRAM disk from accidental deletion or overwrite Data retention of SRAM is ensured by an on board Lithium battery or an exte...

Page 40: ...ect SW1 3 SW1 4 The AR B1474 s SSD firmware occupies 16KB of memory SW1 3 SW1 4 are used to select the memory base address You must select an appropriate address so that the AR B1474 will not conflict with memory installed on other add on memory cards Additionally be sure not to use shadow RAM area or EMM driver s page frame in this area SW1 3 SW1 4 SSD BIOS Address Bank Memory Address OFF OFF C80...

Page 41: ...y pressing the ESC key during system bootup 2 If there is no DOS on this SSD the disk number will be 2 C or D or If any DOS is found by the AR B1474 SSD BIOS the disk number will be 0 A But you can change the disk number from 0 to 2 by pressing the ESC key during system bootup 1 Simulate 2 Disk Drive When FLASH EPROM and SRAM are both used on the AR B1474 or you only have installed SRAM that does ...

Page 42: ... 3 Logical hard disk A B C D E F G 4 Logical hard disk A B C D E F G H Table 5 5 SSD Drive Number for DOS Version before 5 0 Floppy disk No Logical hard disk Condition 0 1 2 3 1 2 3 4 No Logical hard disk A B C D 1 Logical hard disk A B D E C 2 Logical hard disk A B E F C D 3 Logical hard disk A B F G C D E 4 Logical hard disk A B G H C D E F Table 5 6 SSD Drive Number for DOS Version 5 0 and Newe...

Page 43: ...Insert the first memory chip into MEM1 if you are going to configure it as a ROM or SRAM disk If you use a combination of ROM and RAM then insert the FLASH EPROM chip starting with the MEM1 and insert the SRAM chips starting from the first socket which is configured as SRAM l M1 is used to configure the memory type of MEM1 l M2 is used to configure the memory type of MEM2 l M3 is used to configure...

Page 44: ...P5 1 2 3 JP5 Figure 5 4 M1 M3 JP5 Memory Type Setting 5 4 ROM DISK INSTALLATION The section describes the various type SSDs installation steps as follows The jumper and switch adjust as SSD s different type to set 5 4 1 UV EPROM 27Cxxx 2 Switch and Jumper Setting Step 1 Use jumper block to set the memory type as ROM FLASH Step 2 Select the proper I O base port firmware address disk drive number an...

Page 45: ...the ROM numbers as the pattern files Step 4 In the DOS prompt type the command as follows C RFG file name of PGF Step 5 In the RFG EXE main menu choose the Load PGF File item that is user editing PGF file Step 6 Choose the Generate ROM File s the tools program will generate the ROM files for programming the EPROMs Step 7 Program the EPROMs Using the instruments of the EPROM writer to load and writ...

Page 46: ...FLASH 64KX8 128KX8 and 256KX8 Factory Preset 5V FLASH 512KX8 Only M1 M2 M3 1 2 3 A B C 1 2 3 A B C 1 2 3 JP5 1 2 3 JP5 Figure 5 8 Large Page 5V FLASH Jumper Setting 2 Software Programming And then you should create a PGF and generate ROM pattern files by using the RFG EXE Step 1 Making a Program Group File PGF file Step 2 Generate ROM pattern files Turn off your system and then install FLASH EPROM...

Page 47: ... name Step 7 In the main menu choose the Load ROM File item that is the ROM_NAME file name in the PGF file Choose the Program Memory item this item program will program the EPROMs Step 8 NOTE Move the reverse video bar to the Program memory option then press ENTER PGM1474 will write the ROM pattern files onto the FLASH memories Ensure that data is verified by the PGM1474 correctly Reboot the syste...

Page 48: ...mat and copy files Follow the following steps to format and copy files to the FLASH disk it is the same procedure as step 1 to step 4 of using the UV EPROM Step 1 Turn on your computer when the screen shows the SSD BIOS menu please hit the F1 key during the system boot up this enables you to enter the FLASH setup program If the program does not show up check the switch setting of SW1 Step 2 Use Pa...

Page 49: ...ke a normal floppy disk A newly installed RAM disk needs to be formatted before files can be copied to it Use the DOS command FORMAT to format the RAM disk Step 1 Use jumper block to select the memory type as SRAM refer Step 2 Select the proper I O base port firmware address and disk drive number on SW1 Step 3 Insert SRAM chips into sockets starting from MEM1 Step 4 Turn on power and boot DOS from...

Page 50: ... format the RAM disk C FORMAT RAM disk letter U Step 7 If 5V FLASH small page is being used for the first time And then use the DOS command FORMAT to format the FLASH disk Step 8 If large page 5V FLASH is being installed for the first time please use the FLASH programming utility PGM1474 EXE to program ROM pattern files which have been generated by RFG EXE onto the FLASH chips NOTE Users can only ...

Page 51: ...tware Setting We will attach the BU1474 EXE and 1474DOC INI these two files BU1474 EXE is the utility program and the 1474DOC INI is for D O C BIOS When user execute the two files for updating will show the message on the screen as follows AR B1474 Special SSD BIOS for DiskOnChip Version 1 5M C 1998 Acrosser DOC Socket Service Version 0 2 C Copyright 1992 1996 M Systems Ltd TrueFFS BIOS Version 3 ...

Page 52: ......

Page 53: ...on at its normal capability In the worst situation the user may have corrupted the original settings set by the manufacturer After the computer turned on the BIOS will perform a diagnostics of the system and display the size of the memory that is being tested Press the Del key to enter the BIOS Setup program and then the main menu will show on the screen The BIOS Setup main menu includes some opti...

Page 54: ... types for user settings The BIOS supports Pri Master Pri Slave Sec Master and Sec Slave so the user can install up to two hard disks For the master and slave jumpers please refer to the hard disk s installation descriptions and the hard disk jumper settings You can select AUTO under the TYPE and MODE fields This will enable auto detection of your IDE drives during bootup This will allow you to ch...

Page 55: ...l be performed on all system memory When this option is disabled the memory test will be done only for the first 1MB of system memory Memory Test Tick Sound The option enables or disabled the ticking sound during the memory test Password Checking Option This option enables password checking every time the computer is powered on or every time the BIOS Setup is executed If Always is chosen a user pa...

Page 56: ... the specified memory location If no adapter ROM is using the named ROM area this area is made available to the local bus The settings are SETTING DESCRIPTION Disabled The video ROM is not copied to RAM The contents of the video ROM cannot be read from or written to cache memory Enabled The contents of C000h C7FFFh are written to the same address in system memory RAM for faster execution Cached Th...

Page 57: ... for selecting 6 4 ADVANCED CHIPSET SETUP This option controls the configuration of the board s chipset Control keys for this screen are the same as for the previous screen Automatic Configuration If selecting a certain setting for one BIOS Setup option determines the settings for one or more other BIOS Setup options BIOS automatically assigns the dependent settings and does not permit the end use...

Page 58: ...WB WT Feature This option selects the type of caching algorithm of CPU internal cache memory The settings are Wr Thru or Wr Back ISA Write Cycle Insert WS When Enabled the wait state is added in both I O and memory write cycle 16 Bit ISA I O Command WS This option sets the wait state of 16 bit I O cycle The settings are 0WS 1WS 2WS and 3WS 16 Bit ISA Mem Command WS This option sets the wait state ...

Page 59: ...wered on or Setup the password prompt appears only when BIOS is run The password is stored in CMOS RAM User can enter a password by typing on the keyboard As user select Supervisor or User The BIOS prompts for a password user must set the Supervisor password before user can set the User password Enter 1 6 character as password The password does not appear on the screen when typed Make sure you wri...

Page 60: ...vanced Chipset Setup and the new password if it has been changed will be stored in the CMOS The CMOS checksum is calculated and written into the CMOS As you select this function the following message will appear at the center of the screen to assist you to save data to CMOS and Exit the Setup Save current settings and exit Y N 6 9 2 Exit Without Saving When you select this option the following mes...

Page 61: ...able Real Time Clock Calendar DS12887 or compatible chip Watchdog Timer Programmable time out interval from 6 to 42 seconds The activity can be Reset System or Generate IRQ 15 Signal Solid State Disk Up to 3MB bootable solid state disk it accepts 128Kx8 to 1Mx8 EPROM 128Kx8 to 512Kx8 SRAM and 64Kx8 to 512Kx8 5V FLASH Speaker Build in buzzer DMA Channels 7 DMA channels Interrupt Levels 15 vectored ...

Page 62: ......

Page 63: ... PLACEMENT CN6 JP15 JP1 JP14 JP8 JP9 JP10 U17 U26 H16 JP3 H5 JP7 SW1 J5 P10 P8 P6 JP2 JP6 U13 J4 J3 P9 P7 P5 JP11 JP5 JP4 JP13 JP12 J2 J1 J6 J7 LED1 LED2 H19 H18 H4 J8 U18 U12 U8 CN3 DB2 CN1 CN2 H15 H7 H6 H14 CN5 U20 U27 CN4 1 SIMM1 DB1 U7 BUS1 BUS2 CN6 ...

Page 64: ...4 User s Guide 8 2 8 2 DIMENSIONS 85 100 1418 400 150 4800 700 150 300 294 6300 5500 1900 3200 620 100 525 200 200 200 1700 3000 3150 3190 2900 3290 7290 765 540 150 540 9 138 Unit mil 1 inch 25 4 mm 1000 mil ...

Page 65: ...d by SW1 1and SW1 2 The memory address of the memory bank is located on the range selected by SW1 3 and SW1 4 The I O port address of the bank select register is base port 0 The following is the format of the bank select register and bank enable register BASE 0 D7 D6 D5 D4 D3 D2 D1 D0 CS1 CS0 K5 K4 K3 K2 K1 K0 Where CS1 CS0 Chip select CS1 CS0 Socket 0 0 Disable 0 1 MEM1 1 0 MEM2 1 1 MEM3 For diff...

Page 66: ... chapter System Control for the detail description of the COM port s register 1 Initialize COM port Step 1 Initialize COM port in the receiver interrupt mode and or transmitter interrupt mode All of the communication protocol buses of the RS 485 are in the same Step 2 Disable TXC transmitter control the bit 0 of the address of offset 4 just sets 0 NOTE Control the AR B1474 CPU card s DTR signal to...

Page 67: ... The RS 485 s operation of receiving data is in the same of the RS 232 s 5 Basic Language Example a Initial 86C450 UART 10 OPEN COM1 9600 m 8 1 AS 1 LEN 1 20 REM Reset DTR 30 OUT H3FC INP H3FC AND HFA 40 RETURN b Send out one character to COM1 10 REM Enable transmitter by setting DTR ON 20 OUT H3FC INP H3FC OR H01 30 REM Send out one character 40 PRINT 1 OUTCHR 50 REM Check transmitter holding reg...

Page 68: ......

Page 69: ... 128Kx8 1M bits SST 28EE010 128Kx8 1M bits SST 28EE011 128Kx8 1M bits SST PH29EE010 128Kx8 1M bits WINBOND W29EE011 128Kx8 1M bits ATMEL AT29C020 256Kx8 2M bits ATMEL AT29C040 512Kx8 4M bits ATMEL AT29C040A 512Kx8 4M bits SST PH28SF040 512Kx8 4M bits The following list contains EPROMs supported by the AR B1474 AMD Am27C010 128Kx8 1M bits ATMEL AT27C010 128Kx8 1M bits FUJITSHU MBM27C1001 128Kx8 1M ...

Page 70: ...C040 512Kx8 4M bits SGS THOMSON M27C4001 512Kx8 4M bits TI TMS27C040 512Kx8 4M bits TOSHIBA TCS714000 512Kx8 4M bits ATMEL AT27C080 1Mx8 8M bits The following list contains 12V FLASHs supported by the AR B1474 AMD Am28F512 64Kx8 512K bits INTEL P28F512 64Kx8 512K bits SGS THOMSON M28F512 64Kx8 512K bits AMD Am28F010 128Kx8 1M bits INTEL P28F010 128Kx8 1M bits SGS THOMSON M28F1001 128Kx8 1M bits MX...

Page 71: ...ttery connector 3 11 J7 Reset header 3 11 J8 AUX Keyboard connector 3 10 DB1 RS 232 connector for COM A 3 2 DB2 RS 232 connector for COM B 3 2 SW1 Switch select 5 2 SIMM1 DRAM socket 3 9 LED1 Watchdog LED LED2 Power LED JP1 AMD DX2 80 CPU select 3 7 JP2 CPU voltage select 3 7 JP3 RS 485 adapter select for COM A 3 2 JP4 Battery charger select 3 11 JP5 1Mx8 EPROM select 5 6 JP6 CPU base clock select...

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