65MV/65MV-X
50
Bank 0/1 2/3 4/5 DRAM
Timing
This item allows you to select the value in this field,
depending on whether the board has paged DRAMs
or EDO (Extended Data Output) DRAMs.
The choice: SDRM 8 / 10ns
Normal
Medium
Fast
Turbo
SDRAM Cycle Length
TIme
You can select CAS latency time in HCLKs of 2/2 or
3/3. The system board designer should have set the
values in this field, depending on the DRAM installed.
Do not change the values in this field unless you
change specifications of the installed DRAM or the
installed CPU.
DRAM Clock
This item allows you to control the DRAM speed.
The choice: Host Clock, HCLK+33M, HCLK-33M.
P2C/C2P Concurrency
This item allows you to enable/disable the PCI to CPU,
CPU to PCI concurrency.
The choice: Enabled, Disabled.
DRAM Drive Strength
Leave this item with Auto mode.
The choice: Auto, Manual.
DRAM Drive Value
When “DRAM Drive Strength” is set to “Auto”, this
item will be unable to be selected. We don’t recom-
mend user to adjust this item.
Memory Hole
In order to improve performance, certain space in
memory is reserved for ISA cards. This memory must
be mapped into the memory space below 16MB.
The choice: 15M-16M, Disabled.
Fast R-W Turn Around
This item controls the DRAM timing. It allows you to
enable / disable the fast read / write turn around.
The choice: Enabled, Disabled.