Socket VMZV7, User Manual

Page: 34 / 59

CMOS Setup Utility
3-10
DRAM Clock
This item allows you to control the DRAM speed.
The optional are:
Host CLK(Default)
, Host-33M, Host+33M
Memory Hole
In order to improve performance, certain space in memory is reserved for ISA cards.
This memory must be mapped into the memory space below 16MB.
The optional are: 15M-16M,
Disabled(Default)
P2C/C2P Concurrency
This allows you to enable/disable the PCI to CPU, CPU to PCI concurrency.
The optional are:
Enabled(Default)
, Disabled
Fast R-W Turn Around
This item controls the DRAM timing. It allows you to enable/disable the fast read /
write turn around.
The optional are: Enabled,
Disabled(Default)
System BIOS Cacheabled
Selecting Enabled allows caching of the system BIOS ROM at F0000h-FFFFFh,
resulting in better system performance. However, if any program writes to this
memory area, a system error may result
.
The optional are: Enabled,
Disabled(Default)
Video RAM Cacheabled
Selecting Enabled allows caching of the Video RAM, resulting in better system
performance. However, if any program writes to this memory area, a system error
may result.
The optional are: Enabled,
Disabled(Default)