background image

Si52147-EVB

Rev. 0.1

5

2.  Schematics

Figure 2. QFN-48 Device Connection

Figure 3. Device Power Supply

DUTGND

XTL P/N:
ECS-250-20-5PXDU-F-TR
Use SMD footprint

DUTGND

NI

NI

DUTGND

NI

VDD1
VDD2
VDD12
VDD13
VDD23
VDD34
VDD40

CKPW RGD_PD#

SDATA

SCLK

DIFF1_17
DIFF1#_18

DIFF2_19
DIFF2#_20

DIFF3_21
DIFF3#_22

DIFF4_26

DIFF4#_25

DIFF5_28

DIFF5#_27

DIFF6_31

DIFF6#_30

DIFF7_33

DIFF7#_32

OE0

OE1

OE3

OE2

OE4/5

OE6/8

DIFF0_14
DIFF0#_15

DIFF8_36

DIFF8#_35

XIN_DIFFIN#

XOUT_DIFFIN

SSON

NC_44

NC_43

NC_48

NC_47

VDD1

400 W Cesar Chavez

400 W Cesar Chavez

400 W Cesar Chavez

C5
0.1uF

R4

YC1
20pF

C1
0.1uF

YC2
20pF

C60
0.1uF

C61
0.1uF

C2
0.1uF

Y1
25MHz

R1

C3
0.1uF

R2
0

C4
0.1uF

U1

Si52147

V

DD_

P

C

I

1

V

DD_

P

L

L

3

2

OE0

3

OE1

4

SSON

5

VSS_

PL

L

3

6

VSS_

PL

L

4

7

OE2

8

OE3

9

OE4/5

10

OE6/8

11

V

DD_

P

L

L

4

12

V

DD_

P

L

L

2

13

SRC0

14

SRC0#

15

VSS_

PL

L

2

16

SRC1

17

SRC1#

18

SRC2

19

SRC2#

20

SRC3

21

SRC3#

22

SRC4#

25

SRC4

26

VSS_

SR

C

24

V

DD_

S

R

C

23

SRC5#

27

SRC5

28

VSS_

PL

L

1

29

SRC6#

30

SRC6

31

SRC7#

32

SRC7

33

V

DD_

P

L

L

1

34

SRC8#

35

SRC8

36

SCLK

37

SDATA

38

CKPWRGD_PDB

39

VD

D

_

R

E

F

40

XOUT

41

XIN/CLKIN

42

NC_43

43

NC_44

44

VSS_

R

E

F

45

VSS_

PC

I

46

NC_47

47

NC_48

48

R3
0

R10

VDD_3.3V

VDD_3.3V

VDD1

VDD2

VDD12

VDD13

VDD23

VDD34

VDD40

JP4

JUMPER

+

C11

10uF

L6

C16
1uF

TP1

C38
1uF

R8

0

L1

JP5

JUMPER

+

C12

10uF

C7
0.1uF

JP7

JUMPER

R9

0

TP2

L8

VDD_3V3

HEADER 1x1

1

L2

C13

1uF

JP8

JUMPER

TP3

R34

0

+

C8

10uF

GND1

HEADER 1x1

1

L3

C17
1uF

JP1

JUMPER

L9

R5

0

+

C35

10uF

+

C6

10uF

+

C9

10uF

TP4

L4

JP2

JUMPER

C14
1uF

R35

0

R6

0

C36
1uF

+

C10

10uF

JP3

JUMPER

L5

C15
1uF

TP5

+

C37

10uF

R7

0

Summary of Contents for Si52147

Page 1: ... conjunction with the Si52147 device and data sheet for the following tests PCIe Gen1 Gen2 Gen3 compliancy Power consumption test Jitter performance Testing out I2 C code for signal tuning In system validation where SMA connectors are present Si52147 DIFF5 connection for application DIFF4 connection for application DIFF2 connection for application VDD 3 3 V power supply GND SDATA GND SCLK DIFF1 co...

Page 2: ...IFF6 DIFF7 DIFF8 enabled 0 DIFF6 DIFF7 DIFF8 disabled CLKPWGD PD I 3 3 V LVTTL Input After CLKPWGD active high assertion this pin becomes a real time input for asserting power down active low I2C connect For I2C read and write In sequence SData Gnd SCLK from left to right 3 3 V Power Supply VDD Connectors DIFF6 Differential output DIFF1 Differential output DIFF2 Differential output DIFF3 Different...

Page 3: ...n on the Output Internal 100 k pulldown 1 0 5 Spread enabled 0 Spread disabled SDATA I O SMBus Compatible SDATA SCLK I SMBus Compatible SCLOCK Table 2 Spread Selection SSON Frequency MHz Spread Note 0 100 00 OFF Default Value for SSON 0 1 100 00 0 5 Table 1 Input Jumper Settings Continued ...

Page 4: ...ential outputs with a saw tooth spread profile When the SSON is low spread profile is disabled 1 1 2 OE 0 8 Input The output enable pins can change on the fly when the device is on Deasserting valid low results in corresponding DIFF output to be stopped after their next transition with final state low low Asserting valid high results in corresponding output that was stopped are to resume normal op...

Page 5: ...1uF U1 Si52147 VDD_PCI 1 VDD_PLL3 2 OE0 3 OE1 4 SSON 5 VSS_PLL3 6 VSS_PLL4 7 OE2 8 OE3 9 OE4 5 10 OE6 8 11 VDD_PLL4 12 VDD_PLL2 13 SRC0 14 SRC0 15 VSS_PLL2 16 SRC1 17 SRC1 18 SRC2 19 SRC2 20 SRC3 21 SRC3 22 SRC4 25 SRC4 26 VSS_SRC 24 VDD_SRC 23 SRC5 27 SRC5 28 VSS_PLL1 29 SRC6 30 SRC6 31 SRC7 32 SRC7 33 VDD_PLL1 34 SRC8 35 SRC8 36 SCLK 37 SDATA 38 CKPWRGD_PDB 39 VDD_REF 40 XOUT 41 XIN CLKIN 42 NC_...

Page 6: ... L1 SHOULD BE SHORT AS POSSIBLE L1 SHOULD BE SHORT AS POSSIBLE L1 SHOULD BE SHORT AS POSSIBLE L1 SHOULD BE SHORT AS POSSIBLE DUTGND DUTGND DUTGND DUTGND DUTGND DUTGND DUTGND DUTGND DUTGND DUTGND DUTGND DUTGND DUTGND L1 SHOULD BE SHORT AS POSSIBLE L1 SHOULD BE SHORT AS POSSIBLE DUTGND DUTGND DUTGND DUTGND DUTGND DUTGND DUTGND L1 SHOULD BE SHORT AS POSSIBLE L1 SHOULD BE SHORT AS POSSIBLE DUTGND DUTG...

Page 7: ...Si52147 EVB Rev 0 1 7 NOTES ...

Page 8: ...th which if it fails can be reasonably expected to result in significant personal injury or death Silicon Laboratories products are generally not intended for military applications Silicon Laboratories products shall under no circumstances be used in weapons of mass destruction including but not limited to nuclear biological or chemical weapons or missiles capable of delivering such weapons Tradem...

Reviews: