A N 5 4 3
10
Rev. 0.9
Example (with crystal 4 MHz, boot loader function):
1. Provide the initial POWER_UP Command:
2. Apply a wait time of at least 100 ms.
3. Apply the following command:
4. Apply the following command:
5. Send the patch data.
The patch file provided by Silicon Labs typically has a .sg extension. The system controller must send each line of
8 bytes, wait for a CTS, then send the next line of 8 bytes, etc., until the entire patch has been sent. An example
showing the first few lines and final line of a patch file is shown below. Note that the “#” character indicates a
comment and the patch file indicates the required ROM ID for a partial or full download. If the checksum fails, the
part issues an error code, ERR (bit 6 of the STATUS byte received after each 8-byte transfer), and halts. The part
must be reset to recover from this error condition.
Action
Data
Description
CMD
0x01
POWER_UP
ARG1
0X77
NORMAL OPERATION, 4 MHz Crystal
ARG2
0x1F
SETS CRYSTAL LOAD CAPACITANCE
Note:
Change this value to the capacitance that matches the crystal in use.
ARG3
0x27
SETS CRYSTAL BIAS = 7 w/ FASTBOOT
ARG4
0x00
0x10
0x20
BOOT LOADER
FM Receive, 4 MHz Crystal
AM Receive, 4 MHz Crystal
ARG5
0x00
DIGITAL CORE DISABLED/CRYSTAL OSCILLATOR DISABLED
STATUS
NO CTS bit returned
Action
Data
Description
CMD
0xFB
CONTROL REGISTER WRITE COMMAND
ARG1
0X06
CONTROL REGISTER ADDRESS
ARG2
0x80
FORCES CTS = 1
STATUS
NO CTS bit returned
Action
Data
Description
CMD
0x01
POWER_UP
ARG1
0X77
NORMAL OPERATION, 4 MHz Crystal
ARG2
0x1F
SETS CRYSTAL LOAD CAPACITANCE
Note:
Change this value to the capacitance that matches the crystal in use.
ARG3
0x23
SETS CRYSTAL BIAS = 3 w/ FASTBOOT
ARG4
0x00
0x10
0x20
BOOT LOADER
FM Receive, 4 MHz Crystal
AM Receive, 4 MHz Crystal
ARG5
0x11
DIGITAL CORE ENABLED/CRYSTAL OSCILLATOR ENABLED
STATUS
CTS = 1