Silicon Laboratories RS9116, Manual, Page: 32 / 92

RS9116 CC0 Connectivity Module Datasheet v1.0.10, December 2021
silabs.com | Building a more connected world. Rev 1.0.10 32 | Page
3.3.4 Digital Input Output Signals
Symbol Parameter Min. Typ. Max. Unit
V
IH
High level input voltage @3.3V 2.0 - - V
High level input voltage @1.8V 1.17 - - V
V
IL
Low level input voltage @3.3V - - 0.8 V
Low level input voltage @1.8V - - 0.63 V
V
hys
Hysteresis voltage 0.1 VDD - - V
V
OL
Low level output voltage - - 0.4 V
V
OH
High level output voltage VDD-0.4 - - V
I
OL
Low level output current - 4.0 - mA
I
OH
High level output current - 4.0 - mA
Table 8. Digital I/O Signals
•
All numbers are at typical operating conditions unless otherwise stated.
•
SDIO signals will be at 8 mA drive strength.
3.3.5 USB
Parameter Conditions Min. Typ. Max. Units
Vcm DC (DC level measured at receiver
connector) HS Mode
LS/FS Mode -0.05
0.8
- 0.5
2.5 V
Crossover Voltages LS Mode
FS Mode 1.3
1.3 - 2
2 V
Power supply ripple noise (Analog 3.3V) < 160 MHz -50 - 50 mV
Table 9. USB
3.3.6 Pin Capacitances
Symbol Parameter Min. Typ. Max. Unit
C
io
Input/output capacitance, digital pins only - - 2.0 pF
Table 10. Pin Capacitances
3.4 AC Characteristics
3.4.1 Clock Specifications
RS9116 chipsets require two primary clocks:
•
Low frequency 32 kHz clock for sleep manager and RTC
o
Internal 32 kHz RC clock is used for applications with low timing accuracy requirements
o
32 kHz crystal clock is used for applications with high timing accuracy requirements
•
High frequency 40 MHz clock for the ThreadArch® processor, baseband subsystem and the radio
o
40 MHz clock is integrated inside the module, and no external clock needs to be provided