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7.1.1  GPIO Overview

The GPIO pins are organized as 16-bit ports indicated by letters A through F, and the individual pins on each port are indicated by a
number from 15 down to 0.

Table 7.2.  GPIO Pinout

Port

Pin

15

Pin

14

Pin

13

Pin

12

Pin

11

Pin

10

Pin

9

Pin

8

Pin

7

Pin

6

Pin

5

Pin

4

Pin

3

Pin

2

Pin

1

Pin

0

Port A

-

-

-

-

-

-

-

-

-

-

PA5
(5V)

PA4
(5V)

PA3
(5V)

PA2
(5V)

PA1

PA0

Port B

PB13

2

 (5V)

PB12

2

(5V)

PB11

2

 (5V)

-

-

-

-

-

-

-

-

-

-

-

Port C

-

-

-

-

PC11

(5V)

PC10

(5V)

PC9
(5V)

PC8
(5V)

PC7
(5V)

PC6
(5V)

-

-

-

-

-

-

Port D

PD15

2

 (5V)

PD14

2

 (5V)

PD13

2

 (5V)

PD12

(5V)

PD11

(5V)

PD10

(5V)

PD9
(5V)

-

-

-

-

-

-

-

-

-

Port F

-

-

-

-

-

-

-

-

PF7
(5V)

PF6
(5V)

PF5
(5V)

PF4
(5V)

PF3
(5V)

PF2
(5V)

PF1
(5V)

PF0
(5V)

Note:

1. GPIO with 5V compatibility are indicated by (5V)
2. Pins PA2, PA3, PA4, PB11, PB12, PD13, PD14 and PD15 will not be 5V compatible on all future devices.

In order to preserve upgrade options with full hardware compatibility, do not use the pins listed in Note 2 with 5V domains.

 

BGM11S Blue Gecko 

Bluetooth

 

®

 SiP Module Data Sheet

Pin Definitions

silabs.com

 | Building a more connected world.

Rev. 1.0  |  64

Summary of Contents for BGM11S Series

Page 1: ...nterfaces I O Ports Analog I F Lowest power mode with peripheral operational USART Low Energy UART I2C External Interrupts General Purpose I O Pin Reset Pin Wakeup ADC IDAC Analog Comparator Radio Transceiver DEMOD AGC IFADC CRC BUFC RFSENSE MOD FRC RAC EM3 Stop EM2 Deep Sleep EM1 Sleep EM4 Hibernate EM4 Shutoff EM0 Active PA I Q RF Frontend LNA Frequency Synthesizer PGA BALUN Core Memory ARM Cort...

Page 2: ... 128 256 SHA 1 SHA 2 SHA 224 和 SHA 256 以及 ECC 的硬件加密加速 MCU 外围设备选择广泛 12 位 1 Msps SAR AD 转换器 ADC 2 个模数比较器 ACMP DA 电流转换器 IDAC 32 个引脚连接到模拟比较器 ADC 和 IDAC 共用的模拟通道 APORT 30 组通用 I O 引脚 带输出状态保留和异步中断 8 通道 DMA 控制器 12 通道外围设备反射系统 PRS 2 个 16 位定时器 计数器 3 4 比较 捕获 PWM 通道 32 位实时计数器和日历 16 位低功耗定时器 用于生成波形 32 位超低功耗定时器 计数器 用于从任何能量模式定期唤 醒 带异步操作的 16 位脉冲计数器 看门狗定时器 配有电流为 50 nA 的专用 RC 振荡器 2 个通用同步 异步接收器 发射器 UART SPI SmartCard I...

Page 3: ... V2R Bluetooth Smart 2 4 GHz 8 Built in 256 32 30 1000 pcs reel BGM11S22F256GA V2 Bluetooth Smart 2 4 GHz 8 Built in 256 32 30 260 pcs tray SLWSTK6101C1 SLWRB4303A2 Note 1 Blue Gecko Bluetooth Module Wireless Starter Kit WSTK with BGM121A256 radio board SLWRB4302A and BGM111A256 radio board SLWRB4300A expansion board and accessories 2 BGM11S22F256GA V2 Radio Board BGM11S Blue Gecko Bluetooth SiP M...

Page 4: ...Counter PCNT 11 3 6 6 Watchdog Timer WDOG 11 3 7 Communications and Other Digital Peripherals 11 3 7 1 Universal Synchronous Asynchronous Receiver Transmitter USART 11 3 7 2 Low Energy Universal Asynchronous Receiver Transmitter LEUART 11 3 7 3 Inter Integrated Circuit Interface I2C 11 3 7 4 Peripheral Reflex System PRS 11 3 8 Security Features 11 3 8 1 GPCRC General Purpose Cyclic Redundancy Chec...

Page 5: ... 4 1 15 Analog Comparator ACMP 38 4 1 16 I2C 40 4 1 17 USART SPI 43 5 Typical Connection Diagrams 45 5 1 Typical BGM11S Connections 45 6 Layout Guidelines 46 6 1 Layout Guidelines 47 6 2 Effect of PCB Width 48 6 3 Effect of Plastic and Metal Materials 49 6 4 Effect of Human Body 49 6 5 2D Radiation Pattern Plots 50 7 Pin Definitions 52 7 1 Pin Definitions 52 7 1 1 GPIO Overview 64 7 2 Alternate Fu...

Page 6: ...y Level 88 10 Soldering Recommendations 89 10 1 Soldering Recommendations 89 11 Certifications 90 11 1 Bluetooth 90 11 2 CE 90 11 3 FCC 90 11 4 ISEDC 91 11 5 Japan 92 11 6 KC South Korea 92 12 Revision History 93 12 1 Revision 1 0 93 12 2 Revision 0 91 93 12 3 Revision 0 90 93 silabs com Building a more connected world Rev 1 0 6 ...

Page 7: ...rnal Reference TIMER CRYOTIMER PCNT USART Port A Drivers Port B Drivers PAn Port C Drivers PCn PBn Port D Drivers PDn LETIMER RTC RTCC IOVDD AUXHFRCO HFRCO ULFRCO HFXO Port F Drivers PFn Memory Protection Unit LFRCO A P B LEUART CRYPTO CRC DMA Controller APORT Floating Point Unit Energy Management DC DC Converter DVDD VREGVDD VSS VREGSW bypass AVDD PAVDD RFVDD Voltage Regulator DECOUPLE IOVDD Volt...

Page 8: ...me in presence of false alarms may be employed using available timer peripherals 3 2 4 Packet and State Trace The BGM11S Frame Controller has a packet and state trace unit that provides valuable information during the development phase It features Non intrusive trace of transmit data receive data and state information Data observability on a single pin UART data output or on a two pin SPI data out...

Page 9: ...tigation allows operation of the DC DC converter without degrading sensitivity of radio components Protection features include programmable current limiting short circuit protection and dead time protection The DC DC converter may also enter bypass mode when the input voltage is too low for efficient operation In bypass mode the DC DC input supply is internally connected directly to its output thr...

Page 10: ...put reflects the comparison of the counter to a programmed threshold value In PWM mode the TIMER supports generation of pulse width modulation PWM outputs of arbitrary waveforms defined by the sequence of values written to the compare registers with optional dead time insertion available in timer unit TIMER_0 only 3 6 2 Real Time Counter and Calendar RTCC The Real Time Counter and Calendar RTCC is...

Page 11: ...sible with a minimum of software intervention and energy consumption 3 7 3 Inter Integrated Circuit Interface I2C The I2C module provides an interface between the MCU and a serial I2C bus It is capable of acting as both a master and a slave and supports multi master buses Standard mode fast mode and fast mode plus speeds are supported allowing transmission rates from 10 kbit s up to 1 Mbit s Slave...

Page 12: ...ply voltage An interrupt can be generated when the supply falls below or rises above the programmable threshold 3 9 3 Analog to Digital Converter ADC The ADC is a Successive Approximation Register SAR architecture with a resolution of up to 12 bits at up to 1 MSamples s The output sample resolution is configurable and additional resolution is possible using integrated hardware for averaging over m...

Page 13: ...ly page in the information block containing system and device calibration data Read and write operations are supported in en ergy modes EM0 Active and EM1 Sleep 3 11 3 Linked Direct Memory Access Controller LDMA The Linked Direct Memory Access LDMA controller features 8 channels capable of performing memory operations independently of software This reduces both energy consumption and software work...

Page 14: ...11S memory map is shown in the figures below Figure 3 3 BGM11S Memory Map Core Peripherals and Code Space BGM11S Blue Gecko Bluetooth SiP Module Data Sheet System Overview silabs com Building a more connected world Rev 1 0 14 ...

Page 15: ...ation of the features Remaining modules support full configuration Table 3 2 Configuration Summary Module Configuration Pin Connections USART0 IrDA SmartCard US0_TX US0_RX US0_CLK US0_CS USART1 IrDA I2S SmartCard US1_TX US1_RX US1_CLK US1_CS TIMER0 with DTI TIM0_CC 2 0 TIM0_CDTI 2 0 TIMER1 TIM1_CC 3 0 BGM11S Blue Gecko Bluetooth SiP Module Data Sheet System Overview silabs com Building a more conn...

Page 16: ... maximum rating conditions for extended periods may affect device reliability For more information on the available quality and relia bility data see the Quality and Reliability Monitor Report at http www silabs com support quality pages default aspx Table 4 1 Absolute Maximum Ratings Parameter Symbol Test Condition Min Typ Max Unit Storage temperature range TSTG 40 85 C External main supply volta...

Page 17: ... in bypass 50mA load 1 85 3 3 3 8 V VDD Current IVDD DCDC in bypass 200 mA HFCLK frequency fCORE 0 wait states MODE WS0 2 26 MHz 1 wait states MODE WS1 2 38 4 40 MHz Note 1 The minimum voltage required in bypass mode is calculated using RBYP from the DC DC specification table Requirements for other loads can be calculated as VVDD_min ILOAD RBYP_max 2 In MSC_READCTRL register 3 The minimum voltage ...

Page 18: ...t IDCDC_LOAD 75 μA 1 63 2 2 V Low power LP mode LPCMPBIAS3 3 1 8 V target output IDCDC_LOAD 10 mA 1 63 2 1 V Steady state output ripple VR Radio disabled 3 mVpp Output voltage under over shoot VOV CCM Mode LNFORCECCM3 1 Load changes between 0 mA and 100 mA 150 mV DCM Mode LNFORCECCM3 0 Load changes between 0 mA and 10 mA 150 mV Overshoot during LP to LN CCM DCM mode transitions com pared to DC lev...

Page 19: ...er that maintains the output voltage within the specified limits 3 In EMU_DCDCMISCCTRL register 4 Drive levels are defined by configuration of the PFETCNT and NFETCNT registers Light Drive PFETCNT NFETCNT 3 Medi um Drive PFETCNT NFETCNT 7 Heavy Drive PFETCNT NFETCNT 15 BGM11S Blue Gecko Bluetooth SiP Module Data Sheet Electrical Specifications silabs com Building a more connected world Rev 1 0 19 ...

Page 20: ...om flash 102 106 μA MHz 1 MHz HFRCO CPU running while loop from flash 222 350 μA MHz Current consumption in EM1 Sleep mode with all peripher als disabled IEM1 38 4 MHz crystal1 65 μA MHz 38 MHz HFRCO 35 38 μA MHz 26 MHz HFRCO 37 41 μA MHz 1 MHz HFRCO 157 275 μA MHz Current consumption in EM2 Deep Sleep mode IEM2 Full RAM retention and RTCC running from LFXO 3 3 μA 4 kB RAM retention and RTCC runni...

Page 21: ...75 μA MHz 38 MHz HFRCO CPU running while loop from flash 81 μA MHz 38 MHz HFRCO CPU running CoreMark from flash 88 μA MHz 26 MHz HFRCO CPU running while loop from flash 94 μA MHz Current consumption in EM1 Sleep mode with all peripher als disabled DCDC in Low Noise DCM mode1 IEM1 38 4 MHz crystal2 49 μA MHz 38 MHz HFRCO 32 μA MHz 26 MHz HFRCO 38 μA MHz Current consumption in EM1 Sleep mode with al...

Page 22: ... NFETCNT 3 F 3 0 MHz RCOBAND 0 ANASW DVDD 2 CMU_HFXOCTRL_LOWPOWER 0 3 DCDC Low Noise CCM Mode Light Drive PFETCNT NFETCNT 3 F 6 4 MHz RCOBAND 4 ANASW DVDD 4 DCDC Low Power Mode Medium Drive PFETCNT NFETCNT 7 LPOSCDIV 1 LPBIAS 3 LPCILIMSEL 1 ANASW DVDD BGM11S Blue Gecko Bluetooth SiP Module Data Sheet Electrical Specifications silabs com Building a more connected world Rev 1 0 22 ...

Page 23: ...μA MHz 1 MHz HFRCO CPU running while loop from flash 220 μA MHz Current consumption in EM1 Sleep mode with all peripher als disabled IEM1 38 4 MHz crystal1 65 μA MHz 38 MHz HFRCO 35 μA MHz 26 MHz HFRCO 37 μA MHz 1 MHz HFRCO 154 μA MHz Current consumption in EM2 Deep Sleep mode IEM2 Full RAM retention and RTCC running from LFXO 3 2 μA 4 kB RAM retention and RTCC running from LFRCO 2 8 μA Current co...

Page 24: ...rescaled by 3 8 2 mA F 2 4 GHz CW 3 dBm output power 16 5 mA F 2 4 GHz CW 8 dBm output power 24 6 mA RFSENSE current consump tion IRFSENSE 51 nA 4 1 5 Wake up times Table 4 8 Wake up times Parameter Symbol Test Condition Min Typ Max Unit Wake up from EM2 Deep Sleep tEM2_WU Code execution from flash 10 7 μs Code execution from RAM 3 μs Wakeup time from EM1 Sleep tEM1_WU Executing from flash 3 AHB C...

Page 25: ... μs rate 2 4 μs EM4 BOD threshold VEM4DBOD AVDD rising 1 7 V AVDD falling 1 45 V EM4 BOD hysteresis VEM4BOD_HYST 46 mV EM4 response time tEM4BOD_DELAY Supply drops at 0 1V μs rate 300 μs 4 1 7 Frequency Synthesizer Characteristics Table 4 10 Frequency Synthesizer Characteristics Parameter Symbol Test Condition Min Typ Max Unit RF Synthesizer Frequency range FRANGE_2400 2 4 GHz frequency range 2400...

Page 26: ...ng frequency range FRANGE 2400 2483 5 MHz 4 1 8 2 RF Receiver General Characteristics for the 2 4 GHz Band Unless otherwise indicated typical conditions are TOP 25 C VDD 3 3 V DC DC on Crystal frequency 38 4 MHz RF center fre quency 2 440 GHz Conducted measurement from the antenna feedpoint Table 4 12 RF Receiver General Characteristics for 2 4 GHz Band Parameter Symbol Test Condition Min Typ Max ...

Page 27: ...nce signal at 67 dBm Interferer is CW in OOB range BLOCKOOB Interferer frequency 30 MHz f 2000 MHz 27 dBm Interferer frequency 2003 MHz f 2399 MHz 32 dBm Interferer frequency 2484 MHz f 2997 MHz 32 dBm Interferer frequency 3 GHz f 12 75 GHz 27 dBm Intermodulation performance IM Per Core_4 1 Vol 6 Part A Sec tion 4 4 with n 3 25 8 dBm Upper limit of input power range over which RSSI reso lution is ...

Page 28: ...olerance 40 40 ppm 4 1 9 3 LFRCO Table 4 16 LFRCO Parameter Symbol Test Condition Min Typ Max Unit Oscillation frequency fLFRCO ENVREF 1 in CMU_LFRCOCTRL 30 474 32 768 34 243 kHz ENVREF 0 in CMU_LFRCOCTRL 30 474 32 768 33 915 kHz Startup time tLFRCO 500 μs Current consumption 1 ILFRCO ENVREF 1 in CMU_LFRCOCTRL 342 nA ENVREF 0 in CMU_LFRCOCTRL 494 nA Note 1 Block is supplied by AVDD if ANASW 0 or D...

Page 29: ...CO 32 MHz 171 190 μA fHFRCO 26 MHz 147 164 μA fHFRCO 19 MHz 126 138 μA fHFRCO 16 MHz 110 120 μA fHFRCO 13 MHz 100 110 μA fHFRCO 7 MHz 81 91 μA fHFRCO 4 MHz 33 35 μA fHFRCO 2 MHz 31 35 μA fHFRCO 1 MHz 30 35 μA Step size SSHFRCO Coarse of period 0 8 Fine of period 0 1 Period Jitter PJHFRCO 0 2 RMS 4 1 9 5 ULFRCO Table 4 18 ULFRCO Parameter Symbol Test Condition Min Typ Max Unit Oscillation frequency...

Page 30: ...SE 20 27 40 ms Device erase time2 tDERASE 60 74 ms Page erase current3 IERASE 3 mA Mass or Device erase cur rent3 5 mA Write current3 IWRITE 3 mA Note 1 Flash data retention information is published in the Quarterly Quality and Reliability Report 2 Device erase is issued over the AAP interface and erases all flash SRAM the Lock Bit LB page and the User data page Lock Word ULW 3 Measured at 25 C BG...

Page 31: ...VDD 1 62 V DRIVESTRENGTH1 STRONG IOVDD 0 6 V Output low voltage relative to IOVDD VIOOL Sinking 3 mA IOVDD 3 V DRIVESTRENGTH1 WEAK IOVDD 0 2 V Sinking 1 2 mA IOVDD 1 62 V DRIVESTRENGTH1 WEAK IOVDD 0 4 V Sinking 20 mA IOVDD 3 V DRIVESTRENGTH1 STRONG IOVDD 0 2 V Sinking 8 mA IOVDD 1 62 V DRIVESTRENGTH1 STRONG IOVDD 0 4 V Input leakage current IIOLEAK All GPIO except LFXO pins GPIO IOVDD 0 1 30 nA LF...

Page 32: ...ndition Min Typ Max Unit VMON Supply Current IVMON In EM0 or EM1 1 supply moni tored 5 8 8 26 μA In EM0 or EM1 4 supplies moni tored 11 8 16 8 μA In EM2 EM3 or EM4 1 supply monitored 62 nA In EM2 EM3 or EM4 4 supplies monitored 99 nA VMON Loading of Monitored Supply ISENSE In EM0 or EM1 2 μA In EM2 EM3 or EM4 2 nA Threshold range VVMON_RANGE 1 62 3 4 V Threshold step size NVMON_STESP Coarse 200 mV...

Page 33: ...rnal reference buffer Continous operation WAR MUPMODE2 KEEPADC WARM IADC_CONTI NOUS_LP 1 Msps 16 MHz ADCCLK BIASPROG 0 GPBIASACC 1 3 301 350 μA 250 ksps 4 MHz ADCCLK BIA SPROG 6 GPBIASACC 1 3 149 μA 62 5 ksps 1 MHz ADCCLK BIASPROG 15 GPBIASACC 1 3 91 μA Current from all supplies us ing internal reference buffer Duty cycled operation WAR MUPMODE2 NORMAL IADC_NORMAL_LP 35 ksps 16 MHz ADCCLK BIASPROG...

Page 34: ... GPBIASACC 0 3 162 μA 35 ksps 16 MHz ADCCLK BIASPROG 0 GPBIASACC 0 3 123 μA Current from HFPERCLK IADC_CLK HFPERCLK 16 MHz 140 μA ADC Clock Frequency fADCCLK 16 MHz Throughput rate fADCRATE 1 Msps Conversion time4 tADCCONV 6 bit 7 cycles 8 bit 9 cycles 12 bit 13 cycles Startup time of reference generator and ADC core tADCSTART WARMUPMODE2 NORMAL 5 μs WARMUPMODE2 KEEPIN STANDBY 2 μs WARMUPMODE2 KEE...

Page 35: ...al non linearity INL End point method INLADC 12 bit resolution 6 6 LSB Temperature Sensor Slope VTS_SLOPE 1 84 mV C Note 1 PSRR is referenced to AVDD when ANASW 0 and to DVDD when ANASW 1 in EMU_PWRCTRL 2 In ADCn_CNTL register 3 In ADCn_BIASPROG register 4 Derived from ADCCLK BGM11S Blue Gecko Bluetooth SiP Module Data Sheet Electrical Specifications silabs com Building a more connected world Rev ...

Page 36: ...SEL1 RANGE1 100 nA RANGSEL1 RANGE2 500 nA RANGSEL1 RANGE3 2 μA Total Accuracy STEPSEL1 0x10 ACCIDAC EM0 or EM1 AVDD 3 3 V T 25 C 2 2 EM0 or EM1 18 22 EM2 or EM3 Source mode RANGSEL1 RANGE0 AVDD 3 3 V T 25 C 2 EM2 or EM3 Source mode RANGSEL1 RANGE1 AVDD 3 3 V T 25 C 1 7 EM2 or EM3 Source mode RANGSEL1 RANGE2 AVDD 3 3 V T 25 C 0 8 EM2 or EM3 Source mode RANGSEL1 RANGE3 AVDD 3 3 V T 25 C 0 5 EM2 or E...

Page 37: ... relative to current sourced at 0 V ICOMP_SRC RANGESEL1 0 output voltage min VIOVDD VAVDD 2 100 mv 0 04 RANGESEL1 1 output voltage min VIOVDD VAVDD 2 100 mV 0 02 RANGESEL1 2 output voltage min VIOVDD VAVDD 2 150 mV 0 02 RANGESEL1 3 output voltage min VIOVDD VAVDD 2 250 mV 0 02 Output voltage compliance in sink mode sink current change relative to current sunk at IOVDD ICOMP_SINK RANGESEL1 0 output...

Page 38: ... VLP selected as input using VDD 20 nA VBDIV selected as input using 1 25 V reference 1 4 1 μA VADIV selected as input using VDD 1 2 4 μA Hysteresis VCM 1 25 V BIASPROG2 0x10 FULL BIAS2 1 VACMPHYST HYSTSEL3 HYST0 1 75 0 1 75 mV HYSTSEL3 HYST1 10 18 26 mV HYSTSEL3 HYST2 21 32 46 mV HYSTSEL3 HYST3 27 44 63 mV HYSTSEL3 HYST4 32 55 80 mV HYSTSEL3 HYST5 38 65 100 mV HYSTSEL3 HYST6 43 77 121 mV HYSTSEL3...

Page 39: ... kΩ CSRESSEL5 3 39 kΩ CSRESSEL5 4 51 kΩ CSRESSEL5 5 102 kΩ CSRESSEL5 6 164 kΩ CSRESSEL5 7 239 kΩ Note 1 ACMPVDD is a supply chosen by the setting in ACMPn_CTRL_PWRSEL and may be IOVDD AVDD or DVDD 2 In ACMPn_CTRL register 3 In ACMPn_HYSTERESIS register 4 100 mV differential drive 5 In ACMPn_INPUTSEL register The total ACMP current is the sum of the contributions from the ACMP and its internal volt...

Page 40: ...RT condition hold time tHD STA 4 μs STOP condition set up time tSU STO 4 μs Bus free time between a STOP and START condition tBUF 4 7 μs Note 1 For CLHR set to 0 in the I2Cn_CTRL register 2 For the minimum HFPERCLK frequency required in Standard mode refer to the I2C chapter in the reference manual 3 The maximum SDA hold time tHD DAT needs to be met only when the device does not stretch the low ti...

Page 41: ...ion hold time tHD STA 0 6 μs STOP condition set up time tSU STO 0 6 μs Bus free time between a STOP and START condition tBUF 1 3 μs Note 1 For CLHR set to 1 in the I2Cn_CTRL register 2 For the minimum HFPERCLK frequency required in Fast mode refer to the I2C chapter in the reference manual 3 The maximum SDA hold time tHD DAT needs to be met only when the device does not stretch the low time of SCL...

Page 42: ...ition set up time tSU STA 0 26 μs Repeated START condition hold time tHD STA 0 26 μs STOP condition set up time tSU STO 0 26 μs Bus free time between a STOP and START condition tBUF 0 5 μs Note 1 For CLHR set to 0 or 1 in the I2Cn_CTRL register 2 For the minimum HFPERCLK frequency required in Fast mode Plus refer to the I2C chapter in the reference manual BGM11S Blue Gecko Bluetooth SiP Module Dat...

Page 43: ...6 ns IOVDD 3 0 V 37 ns MISO hold time 1 2 tH_MI 6 ns Note 1 Applies for both CLKPHA 0 and CLKPHA 1 figure only shows CLKPHA 0 2 Measurement done with 8 pF output loading at 10 and 90 of VDD figure shows 50 of VDD CS SCLK CLKPOL 0 MOSI MISO tCS_MO tH_MI tSU_MI tSCKL_MO tSCLK SCLK CLKPOL 1 Figure 4 1 SPI Master Timing Diagram BGM11S Blue Gecko Bluetooth SiP Module Data Sheet Electrical Specification...

Page 44: ...ns MOSI hold time 1 2 tH_MO 3 2 tHFPERCLK ns SCLK to MISO 1 2 tSCLK_MI 16 tHFPERCLK 66 2 tHFPERCLK ns Note 1 Applies for both CLKPHA 0 and CLKPHA 1 figure only shows CLKPHA 0 2 Measurement done with 8 pF output loading at 10 and 90 of VDD figure shows 50 of VDD CS SCLK CLKPOL 0 MOSI MISO tCS_ACT_MI tSCLK_HI tSCLK tSU_MO tH_MO tSCLK_MI tCS_DIS_MI tSCLK_LO SCLK CLKPOL 1 Figure 4 2 SPI Slave Timing D...

Page 45: ...nal antenna usage XTAL loop Debug port Reset line Optional UART connection to an external host for Network Co Processor NCP usage Note It s recommended to connect the reset line to the host CPU when NCP mode is used Figure 5 1 Typical connections forBGM11S BGM11S Blue Gecko Bluetooth SiP Module Data Sheet Typical Connection Diagrams silabs com Building a more connected world Rev 1 0 45 ...

Page 46: ...mance of the BGM11S please follow the PCB layout guidelines and ground plane recommendations indicated in this section BGM11S Blue Gecko Bluetooth SiP Module Data Sheet Layout Guidelines silabs com Building a more connected world Rev 1 0 46 ...

Page 47: ... ground plane Place the ground vias as close to the ground pads as possible Figure 6 1 BGM11S PCB top layer design Following rules are recommended for the PCB design Trace to copper clearance 150um PTH drill size 300um PTH annular ring 150um Important The antenna area must align with the pads precisely Please referto the recommended PCB land pattern for exact dimensions Figure 6 2 BGM11S PCB middl...

Page 48: ...er of the PCB 6 2 Effect of PCB Width The BGM11S module should be placed at the center of the PCB edge because the width of the board has an impact to the radiated efficiency but more importantly there should be enough ground plane on both sides of the module for optimal antenna performance The figure below gives an indcation of ground plane size vs maximum achievable range Figure 6 4 BGM11S PCB t...

Page 49: ...ulating the module inside metal casing will prevent the radiation of the antenna Following picture shows how it is possible to adjust the frequency of the antenna The antenna is extremely robust against any objects in close proximity or in direct touch with the antenna and it is recommended not to adjust the dimensions of the antenna area unless it is clear that a metal object such as a coin cell ...

Page 50: ...lots Figure 6 6 Typical 2D Radiation Pattern Front View Figure 6 7 Typical 2D Radiation Pattern Side View BGM11S Blue Gecko Bluetooth SiP Module Data Sheet Layout Guidelines silabs com Building a more connected world Rev 1 0 50 ...

Page 51: ...Figure 6 8 Typical 2D Radiation Pattern Top View BGM11S Blue Gecko Bluetooth SiP Module Data Sheet Layout Guidelines silabs com Building a more connected world Rev 1 0 51 ...

Page 52: ...7 Pin Definitions 7 1 Pin Definitions Figure 7 1 BGM11S Pinout BGM11S Blue Gecko Bluetooth SiP Module Data Sheet Pin Definitions silabs com Building a more connected world Rev 1 0 52 ...

Page 53: ...ating 25 GND Ground 26 V_BATT 1 85 3 8VDC input to the internal DC DC converter and AVDD Internally decoupled and does not require decoupling capacitors 27 GND Ground 28 V_1V8 1 8V output of the internal DC DC converter Internally decoupled so do not use an external decoupling ca pacitor 29 GND Ground 30 DNC Do not connect but leave floating 31 V_IOVDD Digital I O power supply 32 GND Ground 47 GND...

Page 54: ... 16 TIM1_CC3 15 LE TIM0_OUT0 18 LETIM0_OUT1 17 PCNT0_S0IN 18 PCNT0_S1IN 17 US0_TX 18 US0_RX 17 US0_CLK 16 US0_CS 15 US0_CTS 14 US0_RTS 13 US1_TX 18 US1_RX 17 US1_CLK 16 US1_CS 15 US1_CTS 14 US1_RTS 13 LEU0_TX 18 LEU0_RX 17 I2C0_SDA 18 I2C0_SCL 17 FRC_DCLK 18 FRC_DOUT 17 FRC_DFRAME 16 MODEM_DCLK 18 MODEM_DIN 17 MO DEM_DOUT 16 MODEM_ANT0 15 MO DEM_ANT1 14 CMU_CLK1 4 PRS_CH3 9 PRS_CH4 1 PRS_CH5 0 PRS...

Page 55: ...C3 18 LE TIM0_OUT0 21 LETIM0_OUT1 20 PCNT0_S0IN 21 PCNT0_S1IN 20 US0_TX 21 US0_RX 20 US0_CLK 19 US0_CS 18 US0_CTS 17 US0_RTS 16 US1_TX 21 US1_RX 20 US1_CLK 19 US1_CS 18 US1_CTS 17 US1_RTS 16 LEU0_TX 21 LEU0_RX 20 I2C0_SDA 21 I2C0_SCL 20 FRC_DCLK 21 FRC_DOUT 20 FRC_DFRAME 19 MODEM_DCLK 21 MODEM_DIN 20 MO DEM_DOUT 19 MODEM_ANT0 18 MO DEM_ANT1 17 PRS_CH3 12 PRS_CH4 4 PRS_CH5 3 PRS_CH6 15 ACMP0_O 21 A...

Page 56: ...1_CC1 31 TIM1_CC2 30 TIM1_CC3 29 LE TIM0_OUT0 0 LE TIM0_OUT1 31 PCNT0_S0IN 0 PCNT0_S1IN 31 US0_TX 0 US0_RX 31 US0_CLK 30 US0_CS 29 US0_CTS 28 US0_RTS 27 US1_TX 0 US1_RX 31 US1_CLK 30 US1_CS 29 US1_CTS 28 US1_RTS 27 LEU0_TX 0 LEU0_RX 31 I2C0_SDA 0 I2C0_SCL 31 FRC_DCLK 0 FRC_DOUT 31 FRC_DFRAME 30 MODEM_DCLK 0 MODEM_DIN 31 MODEM_DOUT 30 MO DEM_ANT0 29 MODEM_ANT1 28 CMU_CLK1 0 PRS_CH6 0 PRS_CH7 10 PRS...

Page 57: ...1_CC1 2 TIM1_CC2 1 TIM1_CC3 0 LE TIM0_OUT0 3 LE TIM0_OUT1 2 PCNT0_S0IN 3 PCNT0_S1IN 2 US0_TX 3 US0_RX 2 US0_CLK 1 US0_CS 0 US0_CTS 31 US0_RTS 30 US1_TX 3 US1_RX 2 US1_CLK 1 US1_CS 0 US1_CTS 31 US1_RTS 30 LEU0_TX 3 LEU0_RX 2 I2C0_SDA 3 I2C0_SCL 2 FRC_DCLK 3 FRC_DOUT 2 FRC_DFRAME 1 MODEM_DCLK 3 MODEM_DIN 2 MODEM_DOUT 1 MODEM_ANT0 0 MODEM_ANT1 31 PRS_CH6 3 PRS_CH7 2 PRS_CH8 1 PRS_CH9 0 ACMP0_O 3 ACMP...

Page 58: ...IM1_CC1 5 TIM1_CC2 4 TIM1_CC3 3 LE TIM0_OUT0 6 LE TIM0_OUT1 5 PCNT0_S0IN 6 PCNT0_S1IN 5 US0_TX 6 US0_RX 5 US0_CLK 4 US0_CS 3 US0_CTS 2 US0_RTS 1 US1_TX 6 US1_RX 5 US1_CLK 4 US1_CS 3 US1_CTS 2 US1_RTS 1 LEU0_TX 6 LEU0_RX 5 I2C0_SDA 6 I2C0_SCL 5 FRC_DCLK 6 FRC_DOUT 5 FRC_DFRAME 4 MODEM_DCLK 6 MODEM_DIN 5 MODEM_DOUT 4 MODEM_ANT0 3 MODEM_ANT1 2 PRS_CH6 6 PRS_CH7 5 PRS_CH8 4 PRS_CH9 3 ACMP0_O 6 ACMP1_O...

Page 59: ...1_CC3 8 LE TIM0_OUT0 11 LETIM0_OUT1 10 PCNT0_S0IN 11 PCNT0_S1IN 10 US0_TX 11 US0_RX 10 US0_CLK 9 US0_CS 8 US0_CTS 7 US0_RTS 6 US1_TX 11 US1_RX 10 US1_CLK 9 US1_CS 8 US1_CTS 7 US1_RTS 6 LEU0_TX 11 LEU0_RX 10 I2C0_SDA 11 I2C0_SCL 10 FRC_DCLK 11 FRC_DOUT 10 FRC_DFRAME 9 MODEM_DCLK 11 MODEM_DIN 10 MO DEM_DOUT 9 MODEM_ANT0 8 MODEM_ANT1 7 CMU_CLK0 2 PRS_CH0 8 PRS_CH9 11 PRS_CH10 0 PRS_CH11 5 ACMP0_O 11 ...

Page 60: ...0 14 LETIM0_OUT1 13 PCNT0_S0IN 14 PCNT0_S1IN 13 US0_TX 14 US0_RX 13 US0_CLK 12 US0_CS 11 US0_CTS 10 US0_RTS 9 US1_TX 14 US1_RX 13 US1_CLK 12 US1_CS 11 US1_CTS 10 US1_RTS 9 LEU0_TX 14 LEU0_RX 13 I2C0_SDA 14 I2C0_SCL 13 FRC_DCLK 14 FRC_DOUT 13 FRC_DFRAME 12 MODEM_DCLK 14 MODEM_DIN 13 MO DEM_DOUT 12 MODEM_ANT0 11 MO DEM_ANT1 10 PRS_CH0 11 PRS_CH9 14 PRS_CH10 3 PRS_CH11 2 ACMP0_O 14 ACMP1_O 14 37 PC10...

Page 61: ...M1_CC3 21 LE TIM0_OUT0 24 LETIM0_OUT1 23 PCNT0_S0IN 24 PCNT0_S1IN 23 US0_TX 24 US0_RX 23 US0_CLK 22 US0_CS 21 US0_CTS 20 US0_RTS 19 US1_TX 24 US1_RX 23 US1_CLK 22 US1_CS 21 US1_CTS 20 US1_RTS 19 LEU0_TX 24 LEU0_RX 23 I2C0_SDA 24 I2C0_SCL 23 FRC_DCLK 24 FRC_DOUT 23 FRC_DFRAME 22 MODEM_DCLK 24 MODEM_DIN 23 MO DEM_DOUT 22 MODEM_ANT0 21 MO DEM_ANT1 20 PRS_CH0 0 PRS_CH1 7 PRS_CH2 6 PRS_CH3 5 ACMP0_O 24...

Page 62: ...IM1_CC2 25 TIM1_CC3 24 LE TIM0_OUT0 27 LETIM0_OUT1 26 PCNT0_S0IN 27 PCNT0_S1IN 26 US0_TX 27 US0_RX 26 US0_CLK 25 US0_CS 24 US0_CTS 23 US0_RTS 22 US1_TX 27 US1_RX 26 US1_CLK 25 US1_CS 24 US1_CTS 23 US1_RTS 22 LEU0_TX 27 LEU0_RX 26 I2C0_SDA 27 I2C0_SCL 26 FRC_DCLK 27 FRC_DOUT 26 FRC_DFRAME 25 MODEM_DCLK 27 MODEM_DIN 26 MO DEM_DOUT 25 MODEM_ANT0 24 MO DEM_ANT1 23 CMU_CLK1 6 PRS_CH0 3 PRS_CH1 2 PRS_CH...

Page 63: ...M0_OUT0 30 LETIM0_OUT1 29 PCNT0_S0IN 30 PCNT0_S1IN 29 US0_TX 30 US0_RX 29 US0_CLK 28 US0_CS 27 US0_CTS 26 US0_RTS 25 US1_TX 30 US1_RX 29 US1_CLK 28 US1_CS 27 US1_CTS 26 US1_RTS 25 LEU0_TX 30 LEU0_RX 29 I2C0_SDA 30 I2C0_SCL 29 FRC_DCLK 30 FRC_DOUT 29 FRC_DFRAME 28 MODEM_DCLK 30 MODEM_DIN 29 MO DEM_DOUT 28 MODEM_ANT0 27 MO DEM_ANT1 26 CMU_CLK1 7 PRS_CH0 6 PRS_CH1 5 PRS_CH2 4 PRS_CH3 3 ACMP0_O 30 ACM...

Page 64: ...1 2 5V Port C PC11 5V PC10 5V PC9 5V PC8 5V PC7 5V PC6 5V Port D PD15 2 5V PD14 2 5V PD13 2 5V PD12 5V PD11 5V PD10 5V PD9 5V Port F PF7 5V PF6 5V PF5 5V PF4 5V PF3 5V PF2 5V PF1 5V PF0 5V Note 1 GPIO with 5V compatibility are indicated by 5V 2 Pins PA2 PA3 PA4 PB11 PB12 PD13 PD14 and PD15 will not be 5V compatible on all future devices In order to preserve upgrade options with full hardware compa...

Page 65: ...A2 3 PA3 4 PA4 5 PA5 6 PB11 7 PB12 8 PB13 11 PC6 12 PC7 13 PC8 14 PC9 15 PC10 16 PC11 17 PD9 18 PD10 19 PD11 20 PD12 21 PD13 22 PD14 23 PD15 24 PF0 25 PF1 26 PF2 27 PF3 28 PF4 29 PF5 30 PF6 31 PF7 Analog comparator ACMP1 digital out put ADC0_EXTN 0 PA0 Analog to digital converter ADC0 ex ternal reference in put negative pin ADC0_EXTP 0 PA1 Analog to digital converter ADC0 ex ternal reference in pu...

Page 66: ...RAME 0 PA2 1 PA3 2 PA4 3 PA5 4 PB11 5 PB12 6 PB13 9 PC6 10 PC7 11 PC8 12 PC9 13 PC10 14 PC11 16 PD10 17 PD11 18 PD12 19 PD13 20 PD14 21 PD15 22 PF0 23 PF1 24 PF2 25 PF3 26 PF4 27 PF5 28 PF6 29 PF7 30 PA0 31 PA1 Frame Controller Data Sniffer Frame active FRC_DOUT 0 PA1 1 PA2 2 PA3 3 PA4 4 PA5 5 PB11 6 PB12 7 PB13 10 PC6 11 PC7 12 PC8 13 PC9 14 PC10 15 PC11 17 PD10 18 PD11 19 PD12 20 PD13 21 PD14 22...

Page 67: ...X 0 PA1 1 PA2 2 PA3 3 PA4 4 PA5 5 PB11 6 PB12 7 PB13 10 PC6 11 PC7 12 PC8 13 PC9 14 PC10 15 PC11 16 PD9 17 PD10 18 PD11 19 PD12 20 PD13 21 PD14 22 PD15 23 PF0 24 PF1 25 PF2 26 PF3 27 PF4 28 PF5 29 PF6 30 PF7 31 PA0 LEUART0 Receive input LEU0_TX 0 PA0 1 PA1 2 PA2 3 PA3 4 PA4 5 PA5 6 PB11 7 PB12 8 PB13 11 PC6 12 PC7 13 PC8 14 PC9 15 PC10 16 PC11 17 PD9 18 PD10 19 PD11 20 PD12 21 PD13 22 PD14 23 PD15...

Page 68: ...T0 input num ber 0 PCNT0_S1IN 0 PA1 1 PA2 2 PA3 3 PA4 4 PA5 5 PB11 6 PB12 7 PB13 10 PC6 11 PC7 12 PC8 13 PC9 14 PC10 15 PC11 16 PD9 17 PD10 18 PD11 19 PD12 20 PD13 21 PD14 22 PD15 23 PF0 24 PF1 25 PF2 26 PF3 27 PF4 28 PF5 29 PF6 30 PF7 31 PA0 Pulse Counter PCNT0 input num ber 1 PRS_CH0 0 PF0 1 PF1 2 PF2 3 PF3 4 PF4 5 PF5 6 PF6 7 PF7 8 PC6 9 PC7 10 PC8 11 PC9 12 PC10 13 PC11 Peripheral Reflex Syste...

Page 69: ...0 PC7 11 PC8 12 PC9 13 PC10 14 PC11 15 PD9 16 PD10 17 PD11 18 PD12 19 PD13 20 PD14 21 PD15 22 PF0 23 PF1 24 PF2 25 PF3 26 PF4 27 PF5 28 PF6 29 PF7 30 PA0 31 PA1 Timer 0 Capture Compare input output channel 2 TIM0_CDTI0 0 PA3 1 PA4 2 PA5 3 PB11 4 PB12 5 PB13 8 PC6 9 PC7 10 PC8 11 PC9 12 PC10 13 PC11 14 PD9 15 PD10 16 PD11 17 PD12 18 PD13 19 PD14 20 PD15 21 PF0 22 PF1 23 PF2 24 PF3 25 PF4 26 PF5 27 ...

Page 70: ...D13 18 PD14 19 PD15 20 PF0 21 PF1 22 PF2 23 PF3 24 PF4 25 PF5 26 PF6 27 PF7 28 PA0 29 PA1 30 PA2 31 PA3 USART0 Clear To Send hardware flow control input US0_RTS 0 PA5 1 PB11 2 PB12 3 PB13 6 PC6 7 PC7 8 PC8 9 PC9 10 PC10 11 PC11 12 PD9 13 PD10 14 PD11 15 PD12 16 PD13 17 PD14 18 PD15 19 PF0 20 PF1 21 PF2 22 PF3 23 PF4 24 PF5 25 PF6 26 PF7 27 PA0 28 PA1 29 PA2 30 PA3 31 PA4 USART0 Request To Send har...

Page 71: ...e flow control output US1_RX 0 PA1 1 PA2 2 PA3 3 PA4 4 PA5 5 PB11 6 PB12 7 PB13 10 PC6 11 PC7 12 PC8 13 PC9 14 PC10 15 PC11 16 PD9 17 PD10 18 PD11 19 PD12 20 PD13 21 PD14 22 PD15 23 PF0 24 PF1 25 PF2 26 PF3 27 PF4 28 PF5 29 PF6 30 PF7 31 PA0 USART1 Asynchro nous Receive USART1 Synchro nous mode Master Input Slave Out put MISO US1_TX 0 PA0 1 PA1 2 PA2 3 PA3 4 PA4 5 PA5 6 PB11 7 PB12 8 PB13 11 PC6 1...

Page 72: ...se see the device Reference Manual for a complete description PC6 BUSAX PC8 PC10 PF0 PF2 PF4 PF6 BUSBY PC7 BUSAY PC9 PC11 PF1 PF3 PF5 PF7 BUSBX PD10 BUSCX PD12 PD14 PA0 PA2 PA4 PB12 BUSDY PD11 BUSCY PD13 PD15 PA1 PA3 PA5 PB11 PB13 BUSDX ACMP0 1X1Y2X2Y3X3Y4X4Y ACMP1 1X1Y2X2Y3X3Y4X4Y ADC0 1X1Y2X2Y3X3Y4X4Y IDAC0 1X1Y Figure 7 2 BGM11S APORT BGM11S Blue Gecko Bluetooth SiP Module Data Sheet Pin Defini...

Page 73: ...PORT1YCH11 PC11 APORT1YCH17 PF1 APORT1YCH19 PF3 APORT1YCH21 PF5 APORT1YCH23 PF7 ACMP0 APORT2XCH7 BUSBX PC7 APORT2XCH9 PC9 APORT2XCH11 PC11 APORT2XCH17 PF1 APORT2XCH19 PF3 APORT2XCH21 PF5 APORT2XCH23 PF7 ACMP0 APORT2YCH6 BUSBY PC6 APORT2YCH8 PC8 APORT2YCH10 PC10 APORT2YCH16 PF0 APORT2YCH18 PF2 APORT2YCH20 PF4 APORT2YCH22 PF6 BGM11S Blue Gecko Bluetooth SiP Module Data Sheet Pin Definitions silabs c...

Page 74: ... PA3 APORT3YCH13 PA5 APORT3YCH27 PB11 APORT3YCH29 PB13 APORT3YCH31 ACMP0 APORT4XCH3 BUSDX APORT4XCH5 PD13 APORT4XCH7 PD15 APORT4XCH9 PA1 APORT4XCH11 PA3 APORT4XCH13 PA5 APORT4XCH27 PB11 APORT4XCH29 PB13 APORT4XCH31 ACMP0 APORT4YCH2 BUSDY APORT4YCH4 APORT4YCH6 PD14 APORT4YCH8 PA0 APORT4YCH10 PA2 APORT4YCH12 PA4 APORT4YCH28 APORT4YCH30 BGM11S Blue Gecko Bluetooth SiP Module Data Sheet Pin Definition...

Page 75: ...3 PF7 ACMP1 APORT2XCH7 BUSBX PC7 APORT2XCH9 PC9 APORT2XCH11 PC11 APORT2XCH17 PF1 APORT2XCH19 PF3 APORT2XCH21 PF5 APORT2XCH23 PF7 ACMP1 APORT2YCH6 BUSBY PC6 APORT2YCH8 PC8 APORT2YCH10 PC10 APORT2YCH16 PF0 APORT2YCH18 PF2 APORT2YCH20 PF4 APORT2YCH22 PF6 ACMP1 APORT3XCH2 BUSCX APORT3XCH4 APORT3XCH6 PD14 APORT3XCH8 PA0 APORT3XCH10 PA2 APORT3XCH12 PA4 APORT3XCH28 APORT3XCH30 BGM11S Blue Gecko Bluetooth...

Page 76: ...APORT4XCH9 PA1 APORT4XCH11 PA3 APORT4XCH13 PA5 APORT4XCH27 PB11 APORT4XCH29 PB13 APORT4XCH31 ACMP1 APORT4YCH2 BUSDY APORT4YCH4 APORT4YCH6 PD14 APORT4YCH8 PA0 APORT4YCH10 PA2 APORT4YCH12 PA4 APORT4YCH28 APORT4YCH30 ADC0 APORT1XCH6 BUSAX PC6 APORT1XCH8 PC8 APORT1XCH10 PC10 APORT1XCH16 PF0 APORT1XCH18 PF2 APORT1XCH20 PF4 APORT1XCH22 PF6 BGM11S Blue Gecko Bluetooth SiP Module Data Sheet Pin Definition...

Page 77: ...C11 APORT2XCH17 PF1 APORT2XCH19 PF3 APORT2XCH21 PF5 APORT2XCH23 PF7 ADC0 APORT2YCH6 BUSBY PC6 APORT2YCH8 PC8 APORT2YCH10 PC10 APORT2YCH16 PF0 APORT2YCH18 PF2 APORT2YCH20 PF4 APORT2YCH22 PF6 ADC0 APORT3XCH2 BUSCX APORT3XCH4 APORT3XCH6 PD14 APORT3XCH8 PA0 APORT3XCH10 PA2 APORT3XCH12 PA4 APORT3XCH28 APORT3XCH30 BGM11S Blue Gecko Bluetooth SiP Module Data Sheet Pin Definitions silabs com Building a mo...

Page 78: ...APORT4XCH9 PA1 APORT4XCH11 PA3 APORT4XCH13 PA5 APORT4XCH27 PB11 APORT4XCH29 PB13 APORT4XCH31 ADC0 APORT4YCH2 BUSDY APORT4YCH4 APORT4YCH6 PD14 APORT4YCH8 PA0 APORT4YCH10 PA2 APORT4YCH12 PA4 APORT4YCH28 APORT4YCH30 IDAC0 APORT1XCH2 BUSCX APORT1XCH4 APORT1XCH6 PD14 APORT1XCH8 PA0 APORT1XCH10 PA2 APORT1XCH12 PA4 APORT1XCH28 APORT1XCH30 BGM11S Blue Gecko Bluetooth SiP Module Data Sheet Pin Definitions ...

Page 79: ...PORT1YCH3 BUSCY APORT1YCH5 PD13 APORT1YCH7 PD15 APORT1YCH9 PA1 APORT1YCH11 PA3 APORT1YCH13 PA5 APORT1YCH27 PB11 APORT1YCH29 PB13 APORT1YCH31 BGM11S Blue Gecko Bluetooth SiP Module Data Sheet Pin Definitions silabs com Building a more connected world Rev 1 0 79 ...

Page 80: ... Figure 8 1 BGM11S Package Dimensions Dimension MIN NOM MAX A 1 20 1 30 1 40 A1 0 26 0 30 0 34 A2 0 95 1 00 1 05 b 0 15 0 25 0 35 BGM11S Blue Gecko Bluetooth SiP Module Data Sheet Package Specifications silabs com Building a more connected world Rev 1 0 80 ...

Page 81: ...limeters mm unless otherwise noted 2 Dimensioning and Tolerancing per ANSI Y14 5M 1994 3 This drawing conforms to the JEDEC Solid State Outline MO 220 4 Recommended card reflow profile is per the JEDEC IPC J STD 020 specification for Small Body Components 5 Hatching lines means package shielding area 6 Solid pattern 3 1x3 1mm shows non shielding area including its side walls For side wall borderli...

Page 82: ... Device Configuration 1 2 6 Module Type S SiP Module P PCB Module 7 TX Output Power 1 Low 2 Medium 3 High 8 Antenna Type A Internal chip Antenna N RF PIN FCCIDQ0Q11 FCC Certification ID IC5123A 11 IC5123A 11 MSIP CRM BGT 11 KC Korea Certification ID YWWTTTT 1 Y Manufacturing Year 2 WW Manufacturing Work Week 3 TTTT Trace Code BGM11S Blue Gecko Bluetooth SiP Module Data Sheet Package Specifications...

Page 83: ...is the center point of pin no 53 It is very important to align the antenna area relative to the module pads precisely Figure 8 3 BGM11S recommended land pattern Pad No Pad coordinates X Y Pad size mm Solder mask opening size mm Stencil aperture size mm 53 0 0 0 6 x 0 6 0 73 x 0 73 0 48 x 0 48 51 1 75 3 75 52 3 75 3 75 54 0 1 0 56 2 925 0 BGM11S Blue Gecko Bluetooth SiP Module Data Sheet Package Sp...

Page 84: ...ize mm 1 0 15 1 95 0 20 x 0 50 0 33 x 0 63 0 20 x 0 45 9 0 15 5 15 10 0 35 5 65 22 5 15 5 65 23 5 65 5 15 35 5 65 0 35 36 5 15 0 15 41 3 675 0 75 50 0 75 2 075 BGM11S Blue Gecko Bluetooth SiP Module Data Sheet Package Specifications silabs com Building a more connected world Rev 1 0 84 ...

Page 85: ... 90 BSC eE2 1 90 BSC eE3 2 00 BSC Notes 1 All feature sizes shown are at Maximum Material Condition MMC and a card fabrication tolerance of 0 05mm is assumed 2 Dimensioning and Tolerancing is per the ANSI Y14 5M 1994 specification 3 This Land Pattern Design is based on the IPC 7351 guidelines BGM11S Blue Gecko Bluetooth SiP Module Data Sheet Package Specifications silabs com Building a more connec...

Page 86: ... of modules per reel 1000 pcs Disk deformation folding whitening and mold imperfections Not allowed Disk set consists of two 13 inch 330 mm rotary round disks and one central axis 100 mm Antistatic treatment Required Surface resistivity 104 109 Ω sq Figure 9 1 Reel Dimensions Side View Symbol Dimensions mm W0 32 5 0 3 W1 37 1 1 0 BGM11S Blue Gecko Bluetooth SiP Module Data Sheet Tape and Reel Spec...

Page 87: ...formation Symbol Dimensions mm Thickness T 0 061 Width W 25 5 0 2 Figure 9 3 Tape information BGM11S Blue Gecko Bluetooth SiP Module Data Sheet Tape and Reel Specifications silabs com Building a more connected world Rev 1 0 87 ...

Page 88: ...and Feed Direction 9 4 Tape and Reel Box Dimensions Figure 9 5 Tape and Reel Box Dimensions Symbol Dimensions mm W2 368 W3 338 W4 72 9 5 Moisture Sensitivity Level Reels are delivered in packing which conforms to MSL3 Moisture Sensitivity Level 3 requirements BGM11S Blue Gecko Bluetooth SiP Module Data Sheet Tape and Reel Specifications silabs com Building a more connected world Rev 1 0 88 ...

Page 89: ...icular solder paste for profile configurations Avoid usining more than two reflow cycles A no clean type 3 solder paste is recommended A stainless steel laser cut and electro polished stencil with trapezoidal walls should be used to assure good solder paste release Recommended stencil thickness is 0 100mm 4 mils Refer to the recommended PCB land pattern for an example stencil aperture size For fur...

Page 90: ... co located or operating in conjunction with any other antenna or transmitter except in accordance with FCC multi transmitter product procedures OEM Responsibilities to comply with FCC Regulations The transmitter module must not be co located or operating in conjunction with any other antenna or transmitter except in accordance with FCC multi transmitter product procedures OEM integrator is respon...

Page 91: ...e emissions PC peripheral requirements etc Important note In the event that these conditions cannot be met for certain configurations or co location with another transmitter then the IC authori zation is no longer considered valid and the IC ID cannot be used on the final product In these circumstances the OEM integrator will be responsible for re evaluating the end product including the transmitt...

Page 92: ...side of the host equipment The certification mark and certification number must be placed close to the text in the Japanese language which is provided below Translation This equipment contains specified radio equipment that has been certified to the Technical Regulation Conformity Certification under the Radio Law 11 6 KC South Korea BGM11S has certification in South Korea Certification number MSI...

Page 93: ...age marking updated Soldering recommendations updated 1 0 data sheet for full production 12 2 Revision 0 91 Layout guidelines updated Package specifications updated Package marking updated 12 3 Revision 0 90 Preliminary version BGM11S Blue Gecko Bluetooth SiP Module Data Sheet Revision History silabs com Building a more connected world Rev 1 0 93 ...

Page 94: ...mply or express copyright licenses granted hereunder to design or fabricate any integrated circuits The products are not designed or authorized to be used within any Life Support System without the specific written consent of Silicon Labs A Life Support System is any product or system intended to support or sustain life and or health which if it fails can be reasonably expected to result in signif...

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