Silicon Graphics CHALLENGE L, User Manual, Page: 19 / 164

The Challenge Board Set
3
The backplane supports the addition of two more boards selected from the
three standard types listed. The Onyx deskside graphics workstation system
supports a RealityEngine
2
™ (RE
2
) or VTX™ graphics board set that is not
available with the Challenge deskside backplane. The POWER Challenge
does support an optional visualization console, providing a basic color
graphics interface to the system.
Figure 1-1 shows a functional block diagram of the Challenge deskside
subsystems.
Either an IP19 or IP21 CPU board is the heart of the Challenge deskside
system.
The IP21 CPU board in your POWER Challenge deskside can house either
one or two R8000 microprocessors. Your system can house up to three IP21s
with a potential system total of six R8000 microprocessors. Each R8000
microprocessor assembly uses a customized cache controller, a separate
floating point unit, and two tag RAM and two SRAM cache units in addition
to the main integer unit. Board logic on the CPU is “sliced” to give each
microprocessor its own dedicated support logic. This allows each
microprocessor to run independently.
Note that all optional upgrade R8000 CPU boards ordered for the POWER
Challenge come with two microprocessors on each board.
Each IP19 CPU board in your Challenge deskside can house up to four MIPS
R4400 64 bit RISC microprocessors. Your system can house up to three IP19s
with a potential system total of 12 microprocessors. Board logic on the IP19
is “sliced” to give each R4400 its own dedicated support logic. This allows
each R4400 to run independently.
The MC3 system memory board can be populated with 16 MB or 64 MB
SIMM modules. The MC3 has 32 SIMM sockets. Up to 2 GB of on-board
memory is available for Challenge and up to 6 GB on POWER Challenge.