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Silego Technology Inc. 

Page 16 of 41 

08/15/17

GreenPAK Advanced

Development Platform

The next component in this design is the Look-Up table. First Look-Up Table (LUT4) is used to generate logic “1” only when there
are high logic levels on both inputs (AND gate). Select AND gate from “Standard gates” drop-down menu or set table manually.
Second Look-Up Table (LUT5) is configured as NOR gate. It is used to generate reset signal for counter on PIN3 falling edge.

Figure 11. Pin 20 Mode 

Summary of Contents for GreenPAK Advanced Development Platform

Page 1: ...GreenPAK Advanced Development Platform User Guide Silego Technology Corporate Headquarters 1515 Wyatt Drive Santa Clara CA 95054 USA Phone 408 327 8800 http www silego com ...

Page 2: ... foreign United States copyright laws and international treaty provisions Silego hereby grants to licensee a personal non exclusive non transferable license to copy use modify create derivative works of and compile the Silego Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Silego ...

Page 3: ...are 5 3 1 Overview 5 3 2 Functional Description 6 3 2 1 Power Supply 6 3 2 2 USB Communication 6 3 2 3 GND Connections 6 3 2 4 Pin Test Points 6 3 2 5 LEDs 6 3 2 6 Socket Connector 6 3 2 7 Expansion Connector 7 3 2 8 Pins Connectivity 10 4 Example Projects using SLG46721 13 4 1 Project Counter with Clock Enable 13 4 2 Project LED String with Direction 24 Conclusion 32 5 Appendix A Electrical Speci...

Page 4: ...can Design the configuration which corresponds to your project needs Verify the project using software interface to GreenPAK Advanced Development Platform hardware With simple to use and intuitive software and hardware tools you can reduce your project development time and get to market faster To start working with GreenPAK Designer please take the following steps Download and install GreenPAK Des...

Page 5: ...mple project example 2 2 Install Hardware No hardware installation is required for this platform 2 3 Install Software GreenPAK Designer software is available free of charge from the Silego website at http www silego com softdoc software html page 2 4 Uninstall Software The software can be uninstalled in the way typical for your operating system Please refer to your operating system support documen...

Page 6: ...iew Note All test points were designed only for observation of signals on the pins Please do not try to connect external power signal source to test points this will affect GreenPAK Advanced Development Platform functionality and may even damage it Figure 1 GreenPAK Advanced Development Platform Top View ...

Page 7: ...D pins on the left side 6 pins and 1 header on the right side These can be used for test equipment oscilloscope multimeter etc ground reference connection or to connect external test circuitry ground 3 2 4 Pin Test Points Each GreenPAK chip pin including VDD has its own observation test point These test points were designed only for observation To connect an external signal source use a software c...

Page 8: ...agram refer to Figure 3 Each pin except PIN11 GND is controlled through an individual analog switch Expansion connector is a standard 0 1 double row connector GreenPAK Designer can enable or disable external pins as it is shown in the Figure 4 The main purpose of the Expansion connector is to connect an external signal power source safely to the GreenPAK Advanced Development Platform Figure 5 demo...

Page 9: ... following steps check chip presence open all expansion port switches external signals loads can be left connected to expansion port use internal power and load configuration to the chip only for case 3 adjust internal power source to external power level close external power switch open internal power switch configure Development Platform as set in Emulation Tool window Parasitic effects should b...

Page 10: ...nal power switch close all used expansion port switches in the software hit Emulation Test mode button External power should be applied before this step Note that the GreenPAK chip has internal OTP memory which is normally loaded into RAM registers at initialization time Emu lation mode will bypass this load and write the updated version of the project directly into the RAM register inside the Gre...

Page 11: ...ted with a 100 resistor 3 2 8 Pins Connectivity The GreenPAK Advanced Development Platform supports connecting eight types of loads and signal sources Each source has its own special purpose The List of available connections for each test point is presented in the table below Figure 8 Expansion Connector Pin with Protection Resistor Pin Set to VDD Set to GND Pull up Pull down Set Confi gurable But...

Page 12: ...Silego Technology Inc Page 11 of 41 08 15 17 GreenPAK Advanced Development Platform Pin signal sources loading schematics ...

Page 13: ...ogy Inc Page 12 of 41 08 15 17 GreenPAK Advanced Development Platform Note VDD Signal generator works similar to other Signal generators but has wider output voltage range It can provide maximum supply level of 5 5 V ...

Page 14: ...08 15 17 GreenPAK Advanced Development Platform 4 Example Projects using SLG46721 4 1 Project Counter with Clock Enable Blocks required 2 digital inputs 1 digital output 1 Look Up table with two inputs 1 Counter Figure 9 GreenPAK Designer ...

Page 15: ...Silego Technology Inc Page 14 of 41 08 15 17 GreenPAK Advanced Development Platform Figure 10 GreenPAK Components List ...

Page 16: ...ion All components used in the project are shown in Figure 9 next step is to configure selected blocks Double click on PIN20 to open Properties panel Select 1x push pull from the drop down menu in Pin20 properties and hit Apply button Pin Pin Name Type Pin Description 1 VDD PWR Supply Voltage 2 Clock Digital input Digital input 3 Enable Digital Input Digital Input 11 GND GND Ground 20 Counter Outp...

Page 17: ...able First Look Up Table LUT4 is used to generate logic 1 only when there are high logic levels on both inputs AND gate Select AND gate from Standard gates drop down menu or set table manually Second Look Up Table LUT5 is configured as NOR gate It is used to generate reset signal for counter on PIN3 falling edge Figure 11 Pin 20 Mode ...

Page 18: ...Silego Technology Inc Page 17 of 41 08 15 17 GreenPAK Advanced Development Platform Figure 12 Look Up Table Properties Configured as AND Gate ...

Page 19: ...Silego Technology Inc Page 18 of 41 08 15 17 GreenPAK Advanced Development Platform Figure 13 Look Up Table Properties Configured as NOR Gate ...

Page 20: ...m The final step is to connect used components Use Wire tool to perform this action To connect two pins select Set Wire and then click on the first and the second pin of the module or modules that you want to connect The trace will be automatically routed Figure 14 Counter Properties ...

Page 21: ...nnections Use the GreenPAK Advanced Development Platform to test this project Connect the GreenPAK Advanced Development Platform to the PC and press Emulation button This will load the code of your project to the chip and will enable Test functionality of your Development Platform Figure 15 GreenPAK Designer Figure 16 GreenPAK Designer Emulation Tool ...

Page 22: ...n is a software simulation of the real button It switches PIN between VDD and GND signal levels Inverted buffered LED Buffered LED Signal generator is presented as a power source for GreenPAK chip It s configured to output source constant 3 3 V The purpose of the logic generator is to provide clock pulses for the Counter block It is configured for 10 Hz clock source as shown in the Figure 19 Figur...

Page 23: ...reenPAK Advanced Development Platform Functionality Waveform Channel 1 yellow top Logic generator Channel 2 light blue 2nd line Button 1 enable Counter 0 disable Counter Channel 3 magenta 3rd line Counter output Figure 19 Logic Generator Properties ...

Page 24: ... 2nd line Button 1 enable Counter 0 disable Counter Channel 3 magenta 3rd line Counter output Channel 1 yellow top Logic generator Channel 2 light blue 2nd line Button 1 enable Counter 0 disable Counter Channel 3 magenta 3rd line Counter output Figure 20 Waveform Triggered on Button Pressed Figure 21 Waveform no Triggered on Button Released ...

Page 25: ...re 22 Counter works only when the button is pressed 4 2 Project LED String with Direction For this project we will need Analog pin for input data Digital pin for PWM output ADC block PWM block Figure 22 Waveform of the Pulse Width of the Logic Generator and Count End Signal Figure 23 Used Blocks for Current Project ...

Page 26: ...o Technology Inc Page 25 of 41 08 15 17 GreenPAK Advanced Development Platform For testing this project the Signal generator with sine waveform is used Figure 24 Sine Waveform Generated with Signal Generator ...

Page 27: ...Pin configuration Figure 25 Emulation Window with Buffered LED and Signal Generator Pin Pin Name Type Pin Description 1 VDD PWR Supply Voltage 2 DIRECTION Input Controls direction 6 SIGNAL Input Analog Input 11 GND GND Ground 15 LED_A Output LED 17 LED_B Output LED 19 LED_C Output LED ...

Page 28: ...Silego Technology Inc Page 27 of 41 08 15 17 GreenPAK Advanced Development Platform Pin 6 is configured as analog input output This pin is used for generating SINE waveform Figure 26 Pin Properties ...

Page 29: ...Silego Technology Inc Page 28 of 41 08 15 17 GreenPAK Advanced Development Platform Figure 27 Pin Properties Figure 28 Look Up Tables Properties Configured as XOR Gate ...

Page 30: ... When the voltage on the positive input is higher than the voltage on the negative input comparator will set logic 1 on its output ACMP0 positive input is 200 mV ACMP1 is 500 mV and ACMP2 is 800 mV creating 4 states All LEDs are off LED_A is on LED_A and LED_B are on All LEDs are on If Pin 2 logic level is set to 1 these states will transform into All LEDs are on LED_A and LED_B are on LED_A is on...

Page 31: ...Advanced Development Platform Functionality Waveform Channel 1 yellow top Direction Channel 2 light blue 2nd line LED_A Channel 3 magenta 3rd line LED_B Channel 4 blue 4rth line LED_C Figure 30 GreenPAK Designer Figure 31 LED Output with Direction PIN2 Low ...

Page 32: ...Silego Technology Inc Page 31 of 41 08 15 17 GreenPAK Advanced Development Platform The PWM duty cycle rises up to 100 when analog signal is close to 1 V Figure 32 LED Output with Direction PIN2 High ...

Page 33: ...evelopment Platform Conclusion This Development Platform is a truly versatile tool It allows the designer to create a custom project within minutes without using additional devices except oscilloscope For more information please visit our website http www silego com ...

Page 34: ...h VDD V Output Voltage Low 0 4 0 8 V Max Current per TP 30 mA Max Total Current per TPs 250 mA Rise Time 4 75 ns Fall Time 4 60 ns Full Scale Settling Time 0 to 5 5 V 30 40 75 ns Max Output Frequency 0 152 5000 Hz Max Number of Points 180 Sample Rate 10 kSPS Signal Generator Number of Channels TP3 TP10 TP12 TP18 15 Output Voltage Range 0 5 5 V DC Output Impedance 0 5 Short Circuit Current 30 mA Mi...

Page 35: ...onnector Switch Max Voltage 5 5 V Continuous Current through Any Terminal 30 mA Switch On Resistance 20 40 External VDD Switch On Resistance 10 20 On Leakage Current 20 20 nA Off Leakage Current 10 10 nA Bandwidth 10 MHz Max VDD Supply from External Source 5 66 V Mode Parameter Min Typ Max Units ...

Page 36: ...A 15 1 A2 0 7 66 0 6 6 782 78A 0 A2 A 6 6 A 6 82 8A 6 6 6 0 6 6 6 66 0 A2 0 66 0 0 0 0 0 0 0 0 0 0 00 A2 5 5 F 8 6 6 5 5 5 6 5 5 5 5 6 5 5 5 5 6 5 5 5 5 6 5 5 5 5 6 5 4 6 6 A6 5 5 6 6 F A6 66 2 A A A 1 1 5 1 1 4 1 1 9 1 1 1 3 481 4 1 1 1 1 1 1 1 0 854 4 4 4 4 4 4 0 4 4 66 66 66 22 1 4 22 1 A7A1 854 854 1 1 1 1 1 1 1 0 1 4 4 4 4 4 4 4 4 0 4 E 6 54 54 54 E 6 5 6 A 6 7 A 0 2345 4 3 A2 3 6 6 5 54 6 5 ...

Page 37: ... A6 A6 A6 6 0 A6 A6 6 A6 A6 A6 6 0 A6 A6 6 A6 A6 A6 6 0 A6 A6 6 6 6 0 6 4 4 4 4 4 0 4 4 4 4 0 5 4 4 4 4 4 4 4 0 4 0 A6 A6 A6 6 0 A6 A6 6 A6 A6 A6 6 0 A6 A6 6 6 6 5 5 5 6 5 5 5 5 6 5 5 5 5 6 5 5 0 5 0 5 06 5 0 5 1 1 1 481 1 481 1 481 1 481 1 1 1 481 1 3 1 3 1 3 1 3 1 0 3 1 3 1 3 1 3 1 3 1 1 3 481 1 1 1 1 1 1 1 1 1 1 1 481 1 1 1 0 481 1 481 1 0 1 0 1 481 4 4 4 4 4 4 0 4 4 1 1 1 1 1 1 1 1 1 1 1 1 1 0...

Page 38: ...1 1 1 1 0 0 0 0 1 1 1 1 1 481 1 481 1 481 1 481 1 1 1 481 481 1 1 1 1 1 1 1 1 1 1 1 481 1 1 1 0 481 1 481 1 0 1 0 1 481 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0 1 1 1 481 1 481 1 481 1 481 1 481 1 481 1 481 1 0 481 1 481 1 I 5 0 9 9 6 5 0 6 A6 E 6 6 A 6 4 6 54 6 5 0 A6 E 6 6 A 6 4 6 54 6 5 0 6 6 6 A6 6 6 0 6 5 6 1 1 4 1 1 1 1 1 1 1 0 1 1 1 1 1 1 E 6 54 6 6 E 6 5 6 A 6 6 7 0 0 0 6 5 6 5 6 5 A 5 H ...

Page 39: ...A 4 8 5 5 5 6 5 6 6 6 6 6 A6 2 6 6 6 60 6 6 6 A6 G A 2 5 5 A6 G A 2 50 5 A6 5 5 6 6 5 6 6 6 5 6 1 9 22 1 4 22 1 A7A1 A 0 6 6 2 A 0 A 6 69 6 645 B C A B C 81 2 1 B C 81 A B C B C A 6 6 B C A 6 B C B C A 6 9 B C A 1 B C A B C A 4816 B C A B CD A B CD A 0 B CD A B CD A B CD A B CD A B CD A B CD A B CD A B CD A B CD A 0 B CD A B CD A 0 854 48 48 6 6 1 3 1 3 1 3 1 3 1 0 3 1 3 1 3 1 3 1 3 854 854 1 3 1 ...

Page 40: ...ogy Inc Page 39 of 41 08 15 17 GreenPAK Advanced Development Platform Figure 39 USB Protection 1 1 2345 8 1 1 467 9 78 4 4 5 5 8 A6 9 9 9 66 24 5 8 8 4 5 5 5 5 6 0 A6 0 1 1 4 9 9 854 854 9 A A 2345 4 3 3 3 A2 3 6 24 ...

Page 41: ...TR 1 CONN1 15 2N7002 SOT 23 3 2 Q1 Q2 16 MBRX120 TP SOD 123 4 D3 D6 17 SLG59M610V TDFN 8 1 IC4 18 AD8591 SOT 23 6 1 IC11 19 ECMF02 2AMX6 6 UFQFN 1 IC19 20 NRS4018T100MDGJ 4 00x4 00x1 8mm 1 L1 21 BLM18KG260TN1 0603 1608 Metric 2 L2 L4 22 RESISTOR 10k OHM 1 10W 1 0603 1608 Metric 1 R27 23 RESISTOR 44 2k OHM 1 10W 1 0603 1608 Metric 1 R28 24 ACM4520 421 2P T000 4 70x4 50mm 1 L3 25 GRM31CF50J107ZE01L ...

Page 42: ... 1 0402 1005 Metric 2 R4 R9 38 RESISTOR 2 05 1 16W 1 0402 1005 Metric 1 R11 39 RESISTOR 1 91k 1 16W 1 0402 1005 Metric 1 R5 40 RESISTOR 2k 1 16W 0402 1005 Metric 6 R2 R22 R23 R24 R33 R34 41 RESISTOR 24 0402 1005 Metric 2 R14 R17 42 RESISTOR 2 0805 2012 Metric 1 R29 43 YC164 JR 072KL 1206 3216 Metric 4 RN6 RN7 RN8 RN9 44 YC164 JR 07100RL 1206 3216 Metric 5 RN1 RN2 RN3 RN4 RN5 45 5000_ 1 VDD 46 5001...

Page 43: ...C S EVN 12GSDIFMCCD SFP X4FMCCD 88980182 P0582 HW PWAC 2600317 DEV 17514 LCMXO3D 9400HC B EVN P0671 DK K7 CONN G P0467 LCMXO2 1200ZE P1 EVN LCMXO2 4000HE DSIB EVN DK DEV 4SGX530N LCMXO3L SMA EVN P006 006 2 EK U1 VCU108 G A2F500 DEV KIT 2 LCMXO3LF 9400C ASC B EVN 471 014 EVAL TPG ZYNQ3 SL001 80 001005 P0466 EDU EK 10CL025U256 P0496 P0493 DK SOC 10AS066S A DK DEV 10CX220 A 80 001002 iCE40UP5K MDP EV...

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