Siemens XT65, Hardware Overview, Page: 33 / 58

XT65/XT75 Hardware Interface Overview
6.5 Pin Assignment and Signal Description
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XT65_XT75_HO_v00.130 Page 33 of 67 2006-10-12
Confidential / Preliminary
6.5 Pin Assignment and Signal Description
The Molex board-to-board connector on XT65/XT75 is an 80-pin double-row receptacle. The position of the
board-to-board connector can be seen in Figure 11 that shows the top view of XT65/XT75.
Figure 10:
Pin assignment (component side of
XT65/XT75
)
1 GND GND 80
2 ADC1_IN DAC_OUT 79
3 ADC2_IN PWR_IND 78
4 GND Do not use 77
5 GPIO10 GPIO9 76
6 GPIO8 SPICS 75
7 SPIDI GPIO4 74
8 GPIO7 GPIO3 73
9 GPIO6 GPIO2 72
10 GPIO5 GPIO1 71
11 I2CCLK_SPICLK I2CDAT_SPIDO 70
12 VUSB_IN USB_DP 69
13 DAI5 USB_DN 68
14 ISENSE VSENSE 67
15 DAI6 VMIC 66
16 CCCLK EPN2 65
17 CCVCC EPP2 64
18 CCIO EPP1 63
19 CCRST EPN1 62
20 CCIN MICN2 61
21 CCGND MICP2 60
22 DAI4 MICP1 59
23 DAI3 MICN1 58
24 DAI2 AGND 57
25 DAI1 IGT 56
26 DAI0 EMERG_RST 55
27 BATT_TEMP DCD0 54
28 SYNC not connected 53
29 not connected CTS0 52
30 RXD0 Pull up 51
31 Pull up DTR0 50
32 TXD0 RTS0 49
33 VDDLP DSR0 48
34 VCHARGE RING0 47
35 CHARGEGATE VEXT 46
36 GND BATT+ 45
37 GND BATT+ 44
38 GND BATT+ 43
39 GND BATT+ 42
40 GND BATT+ 41