Semiconductor Group
6-67
1999-04-01
On-Chip Peripheral Components
C541U
Note: For accessing the EPBCn registers SFR EPSEL(D2H) must be set with the appropriate
value.
INCEn
Auto increment enable
If bit INCE is set, the address offset register ADROFF for CPU access to USB
memory is automatically incremented after each data write or data read action of
the USBVAL register. This allows the user to handle the USB memory like a FIFO
without modification of the address of the desired memory location by software.
After each modification of ADROFF the data value pointed to is automatically read
out of USB memory and transferred to the USBVAL register.
If INCE=0, the auto-increment function is disabled.
If INCE=1, the auto-increment function is enabled.
DBMn
Dual buffer mode
Bit DBM allows the selection between single buffer mode and dual buffer mode.
If DBM=0, single buffer mode is selected.
If DBM=1, dual buffer mode is selected.
Bit
Function
Summary of Contents for C541U
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Page 21: ...Semiconductor Group 2 6 1997 10 01 Fundamental Structure C541U ...
Page 37: ...Semiconductor Group 4 6 1997 10 01 External Bus Interface C541U ...
Page 133: ...Semiconductor Group 6 88 1999 04 01 On Chip Peripheral Components C541U ...
Page 163: ...Semiconductor Group 8 8 1997 10 01 Fail Safe Mechanisms C541U ...
Page 185: ...Semiconductor Group 10 14 1997 10 01 OTP Memory Operation C541U ...
