Codes
Description
48h
Pattern written in base memory. Determining the amount of memory
below
I MB
memory.
49h
Amount of memory below 1 MB found and verified. Determining the
amound of memory above
I
MB next.
4Bh
Amount of memory above
I
MB found and verfied. Checking for soft reset
and clearing the memory below
I
MB for a soft reset. (I fat power on, go to
checkpoint 4Eh).
4Ch
Memory below
I
MB cleared.
Next, doing a soft reset to clear memory
above 1 MB.
4Dh
Memory above
I
MB cleared via a soft reset. Saved the memory size.
Going to checkpoint 52h next.
4Eh
Memory test started. A soft reset was not done. Displaying the first 64KB
memory size next.
4Fh
The memory size display has started and will be updated during the
memory test. The sequential and random memory tests will be performed
next.
SOh
Memory testing the initialization of the memory below
I
MB is complete.
Adjust the displayed memory size for memory relocation and shadowing
next.
5 l h
The memory size display was adjusted because of memory relocation and
shadowing. The test of the memory above
I
MB will be done next.
52h
The testing and initialization of the memory above
I
MB has complete.
Next, saving the memory size information.
53h
The memory size information has been saved. The CPU registers have
been saved. Entering real mode next.
54h
The shutdown was successful and the CPU is in real mode. Disabling the
Gate A20 line next.
57h
The Gate A20 address line is disabled. Adjusting the memory size
depending on the memory relocation and/or shadowing parameters.
58h
The memory size has been adjusted for memory relocation and/or
shadowing. Clearing the
Hit <DEL>
message next.
59h
The
Hit <DEL>
message has been cleared. The
Wail
... message is being
displayed. Starting the DMA and interrupt controller tests next.
60h
DMA page register test passed. The DMA controller
I
base register test is
next.
62h
The DMA controller
I
base register test passed. Starting the DMA
controller 2 base register test next.
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60 User's Manual