R-671 - 22
27
RESET
IN
Auto clear terminal.
Signal is input to reset the LSI to the initial state when power is applied. Temporarily
set to "L" level the moment power is applied, at this time the LSI is reset. Thereafter
set at "H" level.
28-29
P71-P70
OUT
Auto indicator (light emitting diode LD5) driving signal.
30
XIN
IN
Internal clock oscillation frequency input setting.
The internal clock frequency is set by inserting the ceramic filter oscillation circuit
with respect to XIN terminal.
31
XOUT
OUT
Internal clock oscillation frequency control output.
Output to control oscillation input of XOUT.
32
VSS
IN
Power source voltage: -5V.
VC voltage of power source circuit input.
33
P27
OUT
Tact switch strobe signal.
Signal applied to tact switch section. A pulse signal is input to P15 - P17 terminal
while one of tact switches (SW1,SW2,SW3) on matrix is touched.
34
P26
OUT
Tact switch strobe signal.
Signal applied to tact switch section. A pulse signal is input to P15 - P17 terminal
while one of tact switches (SW4-6) on matrix is touched.
35
P25
OUT
Tact switch strobe signal.
Signal applied to tact switch section. A pulse signal is input to P15 - P17 terminal
while one of tact switches (SW7-9) on matrix is touched.
36-40
P24-P20
OUT
Terminal not used.
41
P17
IN
Signalcoming from touch tact switch.
When any one of tact switches SW1, SW4, SW7 on key and jog unit matrix is
touched, a corresponding signal from P25 - P27 will be input into P17. When no
tact switch is touched, the signal is held at "H" level.
42
P16
IN
Signal similar to P17.
When any one of tact switches SW2, SW5, SW8 on key and jog unit matrix is
touched, a corresponding signal will be input into P16.
43
P15
IN
Signal similar to P17.
When any one of tact switches SW3, SW6, SW9 on key and jog unit matrix is
touched, a corresponding signal will be input into P15.
44-48
P14-P10
IN
Terminal not used.
49-56
P07-P00
OUT
Terminal not used.
57-60
P37-P34
IN
Connected to AVSS
61-72
SEG11-SEG0
OUT
Segment data signal.
Connected to LCD.
The relation between signals are as follows:
LSI signal (Pin No.)
LCD (Pin No.)
LSI signal (Pin No.) LCD (Pin No.)
SEG 0 (72) .............................. S1
SEG 6 (66) ........................... S7
SEG 1 (71) .............................. S2
SEG 7 (65) ........................... S8
SEG 2 (70) .............................. S3
SEG 8 (64) ........................... S9
SEG 3 (69) .............................. S4
SEG 9 (63) ......................... S10
SEG 4 (68) .............................. S5
SEG10 (62) ........................ S11
SEG 5 (67) .............................. S6
SEG11 (61) ........................ S12
73/74
VCC/VREF
IN/IN
Connected to GND.
75
AVSS
IN
Connected to VC.
76
COM3
OUT
Terminal not used.
77
COM2
OUT
Common data signal: COM3.
Connected to LCD (Pin No. 3).
78
COM1
OUT
Common data signal: COM2.
Connected to LCD (Pin No. 2).
79
COM0
OUT
Common data signal: COM1.
Connected to LCD (Pin No. 1).
80
VL3
IN
Power source voltage input terminal.
Standard voltage for LCD.
Pin No.
Signal
I/O
Description
DESCRIPTION OF LSI
CONT
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