Sharp LC-46X8E/S/RU, Service Manual

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LC-46X8E/S/RU
5 – 17
AK24 VDB_B5 I/O Video input/output: Blue channel bit 5;
IDE: IDE data bus bit 15.
EJTAG: PCST[3], output as EJTAG PC Trace bus, bit 3.
POD2: POD2_TS2_D7, the second POD TS2 data[7]. VDB_B5
AL24 VDB_B6 I/O Video input/output: Blue channel bit 6;
IDE: Chip Select 0 for IDE interface.
EJTAG: PCST[4], output as EJTAG PC Trace bus, bit 4.
POD2: POD2_TS2_DEN, the second POD TS2 data valid. VDB_B6
AM24 VDB_B7 I/O Video input/output: Blue channel bit 7;
IDE: Chip Select 1 for IDE interface.
EJTAG: PCST[5], output as EJTAG PC Trace bus, bit 5.
POD2: POD2_TS2_CLK, the second POD TS2 clock. VDB_B7
AN24 VDB_B8 I/O Video input/output: Blue channel bit 8;
IDE: IDE address bus bit 0.
EJTAG: PCST[6], output as EJTAG PC Trace bus, bit 6.
POD2: POD2_TS2_SYNC, the second POD TS2 SYNC. VDB_B8
AP24 VDB_B9 I/O Video input/output: Blue channel bit 9;
IDE: IDE address bus bit 1.
EJTAG: PCST[7], output as EJTAG PC Trace bus, bit 7.
POD2: POD2_TS1_D0, the second POD TS1 data[0]. VDB_B9
AK25 VDB_R0 I/O Video input/output: Red channel bit 0;
IDE: IDE address bus bit 2.
EJTAG: PCST[8], output as EJTAG PC Trace bus, bit 8.
POD2: POD2_TS1_D1, the second POD_TS1 data[1]. VDB_R0
AL25 VDB_R1 I/O Video input/output: Red channel bit 1;
IDE: IDE bus DMA acknowledge.
EJTAG: PCST[9], output as EJTAG PC Trace bus, bit 9.
POD2: POD2_TS1_D2, the second POD TS1 data[2]. VDB_R1
AM25 VDB_R2 I/O Video input/output: Red channel bit 2;
IDE: IDE bus IO Read Strobe signal.
EJTAG: PCST[10], output as EJTAG PC Trace bus, bit 10.
POD2: POD2_TS1_D3, the second POD TS1 data[3]. VDB_R2
AN25 VDB_R3 I/O Video input/output: Red channel bit 3;
IDE: IDE bus IO Write Strobe signal.
EJTAG: PCST[11], output as EJTAG PC Trace bus, bit 11.
POD2: POD2_TS1_D4, the second POD TS1 data[4]. VDB_R3
AP25 VDB_R4 I/O Video input/output: Red channel bit 4;
IDE: nop.
EJTAG:
S1=0, select DCLK/TPC[7:0]/PCST[11:0] of host CPU as output.
S1=1, select DCLK/TPC[7:0]/PCST[11:0] of slave CPU as output.
POD2: POD2_TS1_D5, the second POD TS1 data[5]. VDB_R4
AK26 VDB_R5 I/O Video input/output: Red channel bit 5;
IDE: nop.
EJTAG:
S1=0, two EJTAG are separately used.
S1=1, two EJTAG are used in a daisy chain style.
POD2: POD2_TS1_D6, the second POD TS1 data[6]. VDB_R5
AL26 VDB_R6 I/O Video input/output: Red channel bit 6;
IDE: nop.
EJTAG: TDI1, TDI EJTAG input of host CPU CPU.
POD2: POD2_TS1_D7, the second POD TS1 data[7]. VDB_R6
AM26 VDB_R7 I/O Video input/output: Red channel bit 7;
IDE: nop.
EJTAG: TDO1, TDO EJTAG input of host CPU CPU.
POD2: POD2_TS1_DEN, the second POD TS1 data valid. VDB_R7
AN26 VDB_R8 I/O Video input/output: Red channel bit 8;
IDE: nop.
EJTAG: TMS1, TMS EJTAG input of host CPU CPU.
POD2: POD2_TS1_CLK, the second POD_TS1 clock. VDB_R8
AP26 VDB_R9 I/O Video input/output: Red channel bit 9;
IDE: nop.
EJTAG: TCK1, TCK EJTAG input of host CPU CPU.
POD2: POD2_TS1_SYNC, the second POD TS1 SYNC. VDB_R9
IEEE1394 Interface, 8051 and 656 share with 1394
AM7, AL7, AK7, AK8,
AL8, AM8, AK9, AL9 HSD[7:0] I/O 1394: Parallel data.
Video 656 port: 656D[9:2], data[9:2]
8051: AD[7:0], AD bus. 8051_AD[0:7]
Pin No. Pin Name I/O Pin Function Sheet Name