LC-46X8E/S/RU
5 – 16
AM20
VDB_VS
I/O
Video input/output: Vertical sync;
IDE: DMAREQ, IDE bus DMA request.
EJTAG: NOP
POD2: POD_A_B4, the second POD host interface address bit 4.
VDB_VS
AN20
VDB_G0
I/O
Video input/output: Green channel bit 0;
IDE: IDE data bus bit 0.
EJTAG: TDO2, TDO EJTAG input of slave CPU CPU.
POD2: POD_A_B6, the second POD host interface address bit 6.
VDB_G0
AP20
VDB_G1
I/O
Video input/output: Green channel bit 1;
IDE: IDE data bus bit 1.
EJTAG: TMS2, TMS EJTAG input of slave CPU CPU.
POD2: POD_A_B7, the second POD host interface address bit 7.
VDB_G1
AK21
VDB_G2
I/O
Video input/output: Green channel bit 2;
IDE: IDE data bus bit 2.
EJTAG: TCK2, TCK EJTAG input of slave CPU CPU.
POD2: POD_A_B8, the second POD host interface address bit 8.
VDB_G2
AL21
VDB_G3
I/O
Video input/output: Green channel bit 3;
IDE: IDE data bus bit 3.
EJTAG: DCLK EJTAG output of both CPU CPUs.
POD2: POD_A_B8, the second POD host interface address bit 9.
VDB_G3
AM21
VDB_G4
I/O
Video input/output: Green channel bit 4;
IDE: IDE data bus bit 4.
EJTAG: TPC[0], output as EJTAG PC Trace bus, bit 0.
POD2: POD_CD2B#, the second POD interface card detect.
VDB_G4
AN21
VDB_G5
I/O
Video input/output: Green channel bit 5;
IDE: IDE data bus bit 5.
EJTAG: TPC[1], output as EJTAG PC Trace bus, bit 1.
POD2: POD_CD1B#, the second POD interface card detect.
VDB_G5
AP21
VDB_G6
I/O
Video input/output: Green channel bit 6;
IDE: IDE data bus bit 6.
EJTAG: TPC[2], output as EJTAG PC Trace bus, bit 2.
POD2: POD_RSTB, the second POD host interface reset.
VDB_G6
AK22
VDB_G7
I/O
Video input/output: Green channel bit 7;
IDE: IDE data bus bit 7.
EJTAG: TPC[3], output as EJTAG PC Trace bus, bit 3.
POD2: POD_A_B14, the second POD host interface address bit 14.
VDB_G7
AL22
VDB_G8
I/O
Video input/output: Green channel bit 8;
IDE: IDE data bus bit 8.
EJTAG: TPC[4], output as EJTAG PC Trace bus, bit 4.
POD2: POD2_TS2_D0, the second POD TS2 data[0].
VDB_G8
AM22
VDB_G9
I/O
Video input/output: Green channel bit 9;
IDE: IDE data bus bit 9.
EJTAG: TPC[5], output as EJTAG PC Trace bus, bit 5.
POD2: POD2_TS2_D2, the second POD TS2 data[1].
VDB_G9
AN22
VDB_B0
I/O
Video input/output: Blue channel bit 0;
IDE: IDE data bus bit 10.
EJTAG: TPC[6], output as EJTAG PC Trace bus, bit 6.
POD2: POD2_TS2_D2, the second POD TS2 data[2].
VDB_B0
AP22
VDB_B1
I/O
Video input/output: Blue channel bit 1;
IDE: IDE data bus bit 11.
EJTAG: TPC[7], output as EJTAG PC Trace bus, bit 7.
POD2: POD2_TS2_D3, the second POD TS2 data[3].
VDB_B1
AK23
VDB_B2
I/O
Video input/output: Blue channel bit 2;
IDE: IDE data bus bit 12.
EJTAG: PCST[0], output as EJTAG PC Trace bus, bit 0.
POD2: POD2_TS2_D4, the second POD TS2 data[4].
VDB_B2
AL23
VDB_B3
I/O
Video input/output: Blue channel bit 3;
IDE: IDE data bus bit 13.
EJTAG: PCST[1], output as EJTAG PC Trace bus, bit 1.
POD2: POD2_TS2_D5, the second POD TS2 data[5].
VDB_B3
AM23
VDB_B4
I/O
Video input/output: Blue channel bit 4;
IDE: IDE data bus bit 14.
EJTAG: PCST[2], output as EJTAG PC Trace bus, bit 2.
POD2: POD2_TS2_D6, the second POD TS2 data[6].
VDB_B4
AP23
VDB_CLK
I/O
Video input/output: Clock;
IDE: IDE data bus IO access complete.
EJTAG: NOP
POD2: POD_CE1B#, the second POD interface card enable.
VDB_CLK
Pin No.
Pin Name
I/O
Pin Function
Sheet Name
Summary of Contents for LC-46X8E/S/RU
Page 65: ...LC 46X8E S RU 5 2 1 2 IC506 VHiMM3151XQ 1Q 1 2 1 Block Diagram ...
Page 86: ...LC 46X8E S RU 5 23 1 8 IC8301 RH iXC154WJQZQ 1 8 1 Block Diagram ...
Page 88: ...LC 46X8E S RU 5 25 1 9 IC9101 RH iXC121WJN8Q 1 9 1 Block Diagram ...
Page 163: ...LC 46X8E S RU 33 11 PACKING PARTS S7 S4 S1 S3 S2 S6 S4 S4 S5 S9 S4 S8 ...
Page 165: ...LC 46X8E S RU ...
