Sharp LC-46X8E/S/RU, Service Manual

Page: 75 / 166

LC-46X8E/S/RU
5 – 12
1.7.2 Pin Connections and short description
Pin No. Pin Name I/O Pin Function Sheet Name
DAC Interface
AD2 VDDZ_DAC — Digital power for DAC (+3.3V). D3.3V
AD3 VSSZ_DAC — Digital ground for DAC. GND
AD1 DAC_VS I/O DAC vsync. open
AE1 DAC_HS I/O DAC hsync. open
AE2 DAC_CLK I/O DAC clock open
AE4 DAC_DE I/O DAC DE open
AE3 DAC_FLD I/O DAC field. open
AA5 AVSS51 — Analog ground for DAC (for bias circuit). GND
AB5 COMP — Bias for DAC coupling capacitor. C-D3.3V
AB4 IRSET I Bias for DAC current source. R-GND
AB3 CVBS_B I DAC blue or PB (no connected). TL8105
AB2 ADVSS2 — Analog ground for DAC (for DAC's AVSS52). GND
AB1 ADVDD2 — Analog power for DAC (+3.3V). D3.3V
AC1 C_G I DAC green or Y (no connected). TL8106
AC2 AVSS50 — Analog ground for DAC. GND
AC3 AVDD50 — Analog power for DAC (+3.3V). D3.3V
AC4 Y_R I DAC red or PR (no connected). TL8109
AC5 ADVSS2 — Analog ground for DAC (for DAC's AVSS52). GND
AD5 ADVDD2 — Analog power for DAC (+3.3V). D3.3V
AD4 VM I DAC VM DTM_CVBS
ADC Interface
N2 AVDD — ADC power +3.3V. D3.3V
N3 VIN1 I VRADC INPUT1 (no connected) R-GND
N4 VIN2 I VRADC INPUT2 (no connected) R-GND
N5 AVSS — ADC ground. GND
USB Interface
R3 USB_PPON_PP O USB Power on control. USB_PWRON
R2 USB_OC_PP I USB over current control. USB_PWRFLT
P5 VDDA — Analog core +3.3V supply. D3.3V
P4 DN O Negative output channel. USB_DN
P3 DP O Positive output channel USB_DP
P2 VSSA — Analog core ground. GND
P1 RREFEXT — External resistor connection for current reference. R-GND
R5 VSSP — PLL ground pin Double Bond. GND
R4 VDDP — PLL +1.2V supply Double Bond. C-GND
LVDS Interface
AJ5 LVDS_VSSP — LVDS PLL Ground. GND
AJ3 LVDS_VDDP — LVDS PLL Power supply (+3.3V). D3.3V
AK5 LVDS_VSSO — LVDS Output buffer VSS (Long pad) GND
AK4 LVDS_VDDO — LVDS Output buffer VDD (+3.3V). D3.3V
AK1 TF2P O LVDS Positive Output. (no connected) open
AK2 TF2M O LVDS Negative Output. (no connected) open
AL1 TE2P O LVDS Positive Output. (no connected) open
AL2 TE2M O LVDS Negative Output. (no connected) open
AM1 TD2P O LVDS Positive Output. (no connected) open
AM2 TD2M O LVDS Negative Output. (no connected) open
AN1 TCLK2P O LVDS Positive clock Output. (no connected) open
AN2 TCLK2M O LVDS Negative clock Output. (no connected) open
AP1 TC2P O LVDS Positive Output. (no connected) open
AP2 TC2M O LVDS Negative Output. (no connected) open
AM4 LVDS_VDDO — LVDS Output buffer VDD (+3.3V). D3.3V
AP3 TB2P O LVDS Positive Output. (no connected) open
AN3 TB2M O LVDS Negative Output. (no connected) open
AP4 TA2P O LVDS Positive Output. (no connected) open
AN4 TA2M O LVDS Negative Output. (no connected) open
AJ6 LVDS_VSSO — LVDS Output buffer VSS. GND
AP5 TF1P O LVDS Positive Output. (no connected) open
AN5 TF1M O LVDS Negative Output. (no connected) open
AP6 TE1P O LVDS Positive Output. (no connected) open
AN6 TE1M O LVDS Negative Output. (no connected) open
AP7 TD1P O LVDS Positive Output. (no connected) open
AN7 TD1M O LVDS Negative Output. (no connected) open