Sharp FO-1470, Service Manual

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UX-510UA
FO-1470U
5 – 5
127 GPO[27]/BUSY O
−
13Xs GPO[27] or P1284 returned status to host.
128 GPO[28]/PERROR O
−
13Xs GPO[28] or P1284 returned status to host.
129 GPO[29]/SLCTOUT O
−
13Xs GPO[29] or P1284 returned status to host.
130 GPO[30]/FAULTN O
−
13Xs GPO[30] or P1284 returned status to host.
131 GPIO[29]/PIOD[0] I/O Hu 13Xs GPO[29] or P1284 data or address driven by asic or host
(mode dependent).
132 GPIO[30]/PIOD[1] I/O Hu 13Xs GPO[30] or P1284 data or address driven by asic or host
(mode dependent).
133 GPIO[31]/PIOD[2] I/O Hu 13Xs GPO[31] or P1284 data or address driven by asic or host
(mode dependent).
134 GPIO[32]/PIOD[3] I/O Hu 13Xs GPO[32] or P1284 data or address driven by asic or host
(mode dependent).
135 GPIO[33]/PIOD[4] I/O Hu 13Xs GPO[33] or P1284 data or address driven by asic or host
(mode dependent).
136 GPIO[34]/PIOD[5] I/O Hu 13Xs GPO[34] or P1284 data or address driven by asic or host
(mode dependent).
137 GPIO[35]/PIOD[6] I/O Hu 13Xs GPO[35] or P1284 data or address driven by asic or host
(mode dependent).
138 GPIO[36]/PIOD[7] I/O Hu 13Xs GPO[36] or P1284 data or address driven by asic or host
(mode dependent).
139 VDD
− − −
Digitai power.
140 GPIO[0]/SR4IN I/O Hu 13Xs GPIO[0] or from secondary EXTIA SOUT to DSP.
141 GPO[31]/SR3OUT O
−
13Xs GPO[31] or a signal to the secondary ext. IA (SIN pin) from the DSP.
142 GPIO[37]/IRQ15n I/O Hu 13Xs GPIO[37] or a signal from the ext. IA to a DSP status register.
143 IARESET O
−
13Xs A reset from the DSP to the ext. IA (POR pin).
144 IACLK/DSPCSn O
−
13Xs A signal from the DSP to the ext. IA (MCLK pin) or ext. modem chip
select.
145 IA1CLK I/O H 13Xs A signal from the ext. IA (ICLK pin) to the DSP.
146 SR3IN/DSPIRGn I H 13Xs A signal from the primary ext. IA (SOUT pin) to the DSP or ext.
modem interrupt input.
147 SR4OUT O
−
13Xs A signal to the primary ext. IA (SIN pin) from the DSP.
148 SR1IO I/O H 13Xs A signal to the ext. IA (CTRL1 pin) from the DSP.
149 SA1CLK I/O H 13Xs A signal from the ext. IA (FSYNC pin) to the DSP.
150 VSSPLL
− − −
Ground for PLL.
151 TSTCLK O
−
13Xs Test clock, used to synchronize ext. logic.
152 DEBUGn I Hu
−
External non-maskable input (NMI).
153 RDn O
−
13Xs Read strobe.
154 WRn O
−
13Xs Write strobe.
155 SYNC/GPO[20] I/O Hu 13Xs Indicates a CPU op code fetch cycle or GPO[20].
156 ROMCSn O
−
13Xs ROM chip select.
157 CS1n/GPO[21] O
−
13Xs I/O chip select or GPO[21].
158 VSS
− − −
Digital ground.
159 SXIN I OSC0
−
32.256MHz crystal oscillator input.
160 SXOUT O
−
OSC0 32.256MHz crystal oscillator output.
161 VDD
− − −
Digital power.
162 PM[3]/GPO[3] O
−
13Xs Programmable print motor control pin or GPO[3].
163 PM[2]/GPO[2] O
−
13Xs Programmable print motor control pin or GPO[2].
164 PM[1]/GPO[1] O
−
13Xs Programmable print motor control pin or GPO[1].
165 PM[0]/GPO[0] O
−
13Xs Programmable print motor control pin or GPO[0].
166 SM[3]/GPO[7] O
−
13Xs Programmable scan motor control pin or GPO[7].
167 SM[2]/GPO[6] O
−
13Xs Programmable scan motor control pin or GPO[6].
168 SM[1]/GPO[5] O
−
13Xs Programmable scan motor control pin or GPO[5].
169 SM[0]/GPO[4] O
−
13Xs Programmable scan motor control pin or GPO[4].
170 REGDMA/GPO[18]/CLKConfig[0] O
−
13Xs Register select cycle/dma cycle or GPO[18] and sxin clock divider
config. during reset.
171 WAITn/GPO[19]/CLKConfig[1] I/O Hu 13Xs Wait state/halt state indication or GPO[19] and sxin lock divider config.
during reset.
172 VDDPLL
− − −
Power for PLL.
173 D[7] I/O Tu 13Xs CPU data bus.
174 D[6] I/O Tu 13Xs CPU data bus.
175 D[5] I/O Tu 13Xs CPU data bus.
176 D[4] I/O Tu 13Xs CPU data bus.
SCE114 (IC9) Terminal descriptions
Pin
Pin List I/O
Input Output
Pin Description
No. Type Type