– 53 –
MD-E9000H
Figure 53 SCHEMATIC DIAGRAM (2/12)
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
H.GND
M.GND
S.GND
D.GND
MD_3.2V
P_CTRL
A_GND
D_GND
T/V_CLK
TUN DO
T/V_CE
T/V_DI
A+10V
A GND
TUN_L
TUN_R
TUN_SM
RDS_RST
RDS_DATA
RDS_CL
RDS-READY
SW_5V
MD_+D5V
(MD)D_GND
FAN_CONT
TUN_SM
MAIN PWB-A1
P_MUTE
SW-5V
P_CONT
D_GND
CD+B
CD_GND
P_MUTE
A_+10V
A_GND
R_CH
L_CH
UN_SW-5V
FAN_CONT
SPAN
RDS_DATA
RDS_CL
RDS_READY
T/V_DI
RDS_RST
T/V_CLK
TUN_DO
T/V_CE
RBASS
UNSW_5V
5
7
10
12
11
8
9
13
1
3
2
4
6
14
15
16
1 2 3 4 5 6 7 8 9
10 11 12
3
1
1
2
2
3
1
2
3
2
11 14
10 13
8 9
6
5 7
4
1
12
3
6 5 4 3 2 1
7
DECK
RTRE
+
– +
– +
–
+
–
+
–+
–
+
– +
CCB
INTERFACE
R1
R2
R3
R4
RSEL0
RIN
ROUT
VREF
VDD
CLK
AUX
TUNER
CD/MD
R-CH
L-CH
AUX INPUT PWB-A2
1
16
CNP702
TO DISPLAY PWB
P55 12 - C
CNS301
P57 10 - H
FROM TUNER PWB
CNS901
P58 1 - C
FROM
POWER AMP. PWB
CNS902
P58 1 - D
FROM
POWER AMP. PWB
+B
+B
+B
+B
+B
+B
+B
IC401
LC75341
O PROCESSOR
R401
1K
R402
1K
R403
1K
C406
560P
C405
560P
C404
560P
C407
22/16
C412
1/50
C414
0.1
C416
0.12
R414
3.9K
R448
8.2K
R446
10K
C428
1/50
C424
1/50
C418
0.0015(ML)
C420
1/50
C422
1/50
C426
10/16
CNP403
CNP404
CNP405
R460
270K
CNP406
D442
DS1SS133
D441
DS1SS133
C443 0.001
CNP441
R443
27K
JK441
AUX INPUT
R442
8.2K
R444
27K
C442
390P
C441
390P
R441
8.2K
BI441
CNS441
FFC702