8
8 (T1)
8 (T0)
B0
B1
B2
B3
Z3
Z2
ADM [8:15]
8
8 (T1)
8 (T0)
Z1
Z0
ADM [0:7]
68483-19.EPS
Figure 17 : One Block - One Z
Z3
Z2
ADM [8:15]
Z1
Z0
ADM [0:7]
8
8
(T0. T1) = Page mode
68483-20.EPS
Figure 18 : One Block - Two Z
A MEMORY WORD
0
1
2
3
Z
7
6
5
4
3
2
1
0
X [0:2]
68483-21.EPS
Figure 19
V.3.2 - MASKING PLANES
Masking planes are very useful for general purpose
area filling or clipping. It may be practical to use one
or two planes smaller than the color bit plane if they
cyclically cover a frame buffer.
The masking planes must be in bank 3.
V.3.3 - OBJECTS AND CHARACTERS
Objects may be located in unused parts of the
frame buffer.
Character generators can be implemented in any
plane of any bank. They can also be implemented
in ROM. In this case, plane Z = 1 or 3 offer relaxed
access time requirements.
V.4 - Examples
Figure 20. gives the schematic for a 512 x 384 non
interlaced application. A CLK signal in the 15 to 18
MHz range should produce a 50 to 60Hz refresh
rate. The on-chip video shift registers may be used
if no more than four bits per pixel are required. One
64 K x 8 memory block may be implemented using
either eight 64 K x 1 or two 64 K x 4 components.
One memory block holds two 512 x 384 color bit
planes.
TS68483A
20/30
