© by SEMIKRON / 2020-05-25 / Technical Explanation / SKYPER
®
12 PV
PROMGT.1026/ Rev.7/ Template Technical Explanation
Page 7/37
Referring to the application example shown in Figure 3 and Figure 4, Table 3 describes the settings made.
Table 3: SKYPER
®
12 PV | Application example | Settings
Function
Configuration
Remark
Chapter
Active clamping
Disabled
Disabled by connecting the pins
CLMP_IN_TOP and CLMP_IN_BOT to
the corresponding PWR_GND pins.
Bidirectional error
(=HALT)
Disabled
Disabled by connecting the pin
nERR_IN to pin PWR_VS.
Dynamic short circuit
protection (DSCP)
Enabled at both output
channels
Enabled by connecting the pins
VCE_IN_TOP and VCE_IN_BOT to the
corresponding collectors of the
semiconductors through R
VCE_TOP
,
D
VCE_TOP
and R
VCE_BOT
, D
VCE_BOT
.
DSCP configuration via pins
CFG_VCE_TOP and CFG_VCE_BOT.
Dead time generation
Disabled
Disabled by connecting pin CFG_IDT to
pin PWR_VS.
Error mode
In case of any secondary
side error condition the
event will be reported at
the pin nERR_OUT. The
driver turns-off the
affected output
immediately and the
second output with the
next turn-off signal at
the corresponding input.
Both outputs remain
blocked until the error
state is reset .
Selected by connecting pin CFG_ERR to
pin PWR_VS.
Error propagation
delay time
700ns (typical value)
Fixed value.
External error
Disabled at both
secondary sides.
Disabled by connecting the pins
nERR_IN_TOP and nERR_IN_BOT to
the corresponding PWR_VS pins.
Filter
Analogue
Selected by connecting pin CFG_FLT to
pin PWR_GND.
Interlock
Disabled
Disabled by connecting pin CFG_IDT to
pin PWR_VS.
Jitter
±3ns (typical value)
Selected by connecting the pin
CFG_FLT to pin PWR_GND.
Short pulse
suppression (SPS)
200 ns (typical value)
Selected by connecting pin CFG_FLT to
pin PWR_GND.
Undervoltage lockout
(UVLO)
Always active on primary
and secondary side
-