© by SEMIKRON / 2020-05-25 / Technical Explanation / SKYPER
®
12 PV
PROMGT.1026/ Rev.7/ Template Technical Explanation
Page 4/37
2.2
Application example
Figure 3 and Figure 4 show a typical SKYPER
®
12 PV core setup to control a multilevel semiconductor
module. The SKYPER
®
12 PV employs SEMIKRON’s highly-integrated ASIC chipset allowing easy
configuration with only a few simple external circuits and in turn reducing the project and development
time as well as the cost.
2.2.1
Primary side
Figure 3: SKYPER
®
12 PV | Application example | Primary side
Table 1: SKYPER
12 PV | Application example | Primary side | Recommended values
Component
Value
Remark
C
TOP_IN
/ C
BOT_IN
1nF
Optional filter capacitors suppressing high-frequency signals.
For further information please refer to [3].
C
BST
-
Optional boost capacitor, dimensioning according to chapter
4.11.
R
TOP_IN
/ R
BOT_IN
10kΩ
Optional pull-down resistors, for steady off state of the
corresponding output, if no input signal is applied.
R
nERR_OUT
4.75kΩ
Optional pull-up resistor, mandatory if error output is used.
Dimensioning according to chapter 4.6
PWR_GND
X10:01
C
B
S
T
SKYPER
®
12 PV
PWR_VS
X10:09
CFG_ERR
X10:05
PWR_VS
X10:10
nERR_OUT
X10:03
nERR_IN
X10:04
PWR_VS
TOP_IN
X10:07
PWR_GND
X10:01
nERR_OUT
TOP_IN
R
n
E
R
R
_
O
U
T
C
T
O
P
_
IN
R
T
O
P
_
IN
BOT_IN
X10:08
PWR_GND
X10:01
BOT_IN
C
B
O
T
_
IN
R
B
O
T
_
IN
CFG_IDT
X10:02
CFG_FLT
X10:06
PWR_GND
X10:01
PWR_GND
