10
Cheetah 73LP FC Product Manual, Rev. D
4.2.3
General performance characteristics
4.3
Start/stop time
If the Motor Start option is disabled, the drive becomes ready within 20 seconds after DC power is applied. If a
recoverable error condition is detected during the start sequence, the drive executes a recovery procedure and
the time to become ready may exceed 30 seconds. Stop time is less than 30 seconds (maximum) from removal
of DC power.
If the Motor Start option is enabled, the internal controller accepts the commands listed in the
Fibre Channel
Interface Manual
less than 3 seconds after DC power has been applied. After the Motor Start command has
been received, the drive becomes ready for normal operations within 20 seconds (excluding the error recovery
procedure). The Motor Start command can also be used to command the drive to stop the spindle.
There is no power control switch on the drive.
4.4
Prefetch/multi-segmented cache control
The drive provides a prefetch (read look-ahead) and multi-segmented cache control algorithms that in many
cases can enhance system performance. Cache refers to the drive buffer storage space when it is used in
cache operations. To select this feature, the host sends the Mode Select command with the proper values in
the applicable bytes in page 08h. Prefetch and cache operations are independent features from the standpoint
that each is enabled and disabled independently using the Mode Select command; however, in actual opera-
tion, the prefetch feature overlaps cache operation somewhat as described in sections 4.5.1 and 4.5.2.
All default cache and prefetch mode parameter values (Mode Page 08h) for standard OEM versions of this
drive family are given in Table 15.
Minimum sector interleave
1 to 1
Data buffer to/from disc media (one 512-byte logical block)*
Minimum
38.4 MBytes/sec
Average
52.0 MBytes/sec
Maximum
63.9 MBytes/sec
Fibre Channel Interface maximum instantaneous transfer rate
1 GHz
2 GHz
106 Mbytes/sec* per
port (dual port = 212
Mbytes/sec*)
212 Mbytes/sec* per
port (dual port = 424
Mbytes/sec*)
Logical block sizes
Default is 512-byte data blocks
Variable 512 to 704 bytes per sector in even number of bytes per sec-
tor. If n (number of bytes per sector) is odd, then n-1 will be used.
Read/write consecutive sectors on a track
Yes
Flaw reallocation performance impact (for flaws reallocated at format time
using the spare sectors per sparing zone reallocation scheme.)
Negligible
Overhead time for head switch in sequential mode
0.8 msec
Overhead time for one track cylinder switch in sequential mode
1.2 msec (typical)
Average rotational latency
2.99 msec
*Assumes no errors and no relocated logical blocks. Rate measured from the start of the first logical block transfer to or
from the host.
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