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4430-V & VN BPSK/QPSK VME Demodulator & Optional Modulator User’s Manual
Doc: 4430_V,VN.fm, © 11 Jul 2005, 14:55
3.5.26 Register 32h (65h), Demodulator General Status
This register provides status on the operational state of the demodulator. The
following figure illustrates the breakout of register bit assignments.
Figure 3.5.26: Register 32h Bit Assignments
Table 3.5.34: Demodulator General Status Register Definition
Loop Stress ADC status can be used to determine when a loop stress value is
available during loop null tuning in place of a delay loop.
The demodulator signal present and signal lock bits indicate when the demodu-
lator first detects a signal and then locks to that signal respectively.
Since this is a read function, no programing example is provided.
7
6
5
4
3
2
1
0
0/1
-
0/1
0/1
-
-
-
-
Demodulator Input is Locked
Demodulator Input Present
Loop Stress ADC is Busy
Unused
Unused
Unused
Unused
Unused
Bit No.
Bit Name(s)
Functional Description
07-03
Unused
Set to zero during proper operation
02
Loop Stress ADC
0 - ADC Busy
1 - Loop Stress value is converted
01
Demod Input Present
0 - Demod input is within range for the AGC circuitry
1 - Demod input is not within range for the AGC circuitry
00
Demod Lock
0 - Demodulator is locked to the input signal
1 - Demodulator is not locked to the input signal
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