56
4430-V & VN BPSK/QPSK VME Demodulator & Optional Modulator User’s Manual
Doc: 4430_V,VN.fm, © 11 Jul 2005, 14:55
3.
This value is then used to calculate loop bandwidth per the following
equation:
Loop Bandwidth (LBW) = LPSR x Symbol Rate
Loop Bandwidth (LBW) = 0.02 x 1000 = 20h
Note:
The LBW and %LBW values should be evaluated per the
criteria outlined in
Section 3.3.5
Evaluation of the Demodula-
tor Eb/No Setup on page 25
for the model of 4430 device in-
stalled.
The Loop Bandwidth (LBW) of 20Hz results in a %LBW as follows:
%Loop Bandwidth (%LBW) = LBW/Demod f
c
%Loop Bandwidth (%LBW) = 20/8000 = 0.0025
Since the range for a 4430-VN %LBW is between the values of (0.00003 to
0.0005), the LBW value can not be supported by the VCXO. Therefore, the %LBW
number will be defaulted at the highest value of 0.0005. The new LBW value will
then be calculated as follows:
LBW = %LBW
x
Demod f
c
LBW = 0.0005
x
8000 = 4Hz
4.
The square root of the carrier frequency is determined:
Demod f
c
-2
= 8000
-2
= 89.44
5.
The loop bandwidth value is then divided by the square root of the carrier
frequency:
LBW/Demod f
c
-2
= 4/8000
-2
= 4/89.44 = 0.04
6.
This value is then compared to range values from
Table 3.5.23, “Loop Capacitor
Selection,” on page 55
to determine the loop capacitor value select bits and
the loop capacitor value:
Given that the board is a 4430-VN, the value of 0.224 falls in the range of 0.015
to 0.1 and the corresponding capacitor select bits are 011b. The
corresponding capacitor value (C) is 6.8 x 10
-7
.
7.
Determine the input and mode selection from the user input defined in
Section 3.5
Register Programming on page 31
:
Demod Input = BPSK
Demod Source = Ch. 1
This means that bit 5 is a one and bit 6 of register 38h is set to zero.
8.
Arranging the bit selections:
Register 38h = 01000011b = 43h
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