Pin No.
Function Name
Function
IN/OUT
1
PCTL
Parallel I/F Control signal for LCD Driver
OUT
2
PS2 EN
Enable for Progressive Scan2
OUT
3
SCL2
IIC bus 2 Clock
IN/OUT
4
SDA2
IIC bus 2 Data
IN/OUT
5
POWER SW
“L” : Power Off, “H”: Power On
IN/OUT
6 VSS
GND
7
CENT DET
Lens location detection (Center)
IN
8 ADDRESS1
Address
bus1
OUT
9 ADDRESS2
Address
bus2
OUT
10 ADDRESS3
Address
bus3
OUT
11 ADDRESS4
Address
bus4
OUT
12 VCC
5V
13 ADDRESS5
Address
bus5
OUT
14 VSS
GND
15 ADDRESS6
Address
bus6
OUT
16 ADDRESS7
Address
bus7
OUT
17 ADDRESS8
Address
bus8
OUT
18 ADDRESS9
Address
bus9
OUT
19 ADDRESS10
Address
bus10
OUT
20 ADDRESS11
Address
bus11
OUT
21 ADDRESS12
Address
bus12
OUT
22 ADDRESS13
Address
bus13
OUT
23 ADDRESS14
Address
bus14
OUT
24 ADDRESS15
Address
bus15
OUT
25 ADDRESS16
Address
bus16
OUT
26 VCC
5V
27 ADDRESS17
Address
bus17
OUT
28 VSS
GND
29
SCL1
IIC bus 1 Clock
IN/OUT
30
SDA1
IIC bus 1 Data
IN/OUT
31
RAS
RAS Signal for DRAM Access
OUT
32
CASL
CAS Signal (Lower 16bits) for SRAM Access
OUT
33
SYS_SW
Power Switch for Peripheral ICs
OUT
34
AFT-V
V-Sync for panel drive
IN
35 VSS
GND
36
BF-V
V-Sync for Input Signal
IN
37 ADDRESS18
Address
bus18
OUT
38 ADDRESS19
Address
bus19
OUT
39 ADDRESS20
Address
bus20
OUT
40 VCC
5V
41 ADDRESS21
Address
bus21
OUT
42 VSS
GND
43 READ
READ
Signal
OUT
44
WDT
Over flow output from Watch Dog Timer
OUT
45 DATA31
Data
bus31
IN/OUT
46 DATA30
Data
bus30
IN/OUT
47
WRH
WRITE Signal (Higher 16 bits)
OUT
48
WRL
WRITE Signal (Lower 16 bits)
OUT
49
CS1
Chip Select for BGA
OUT
50
CS0
Chip Select for Flash Memory
OUT
-46-
■
CPU (IC801) Port Functions
Summary of Contents for PLC-EF10BA
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