– 26 –
BLOCK DIAGRAM SIGNAL LINES
SPI Flash
(64Mb: 8MB)
BackEnd
CPU
A
Audio
ST Amp.
Line Out
TV Speakers
(10W+10W)
RESET
Clock_24.576MH
z
Memory
Interface
Unit
S/P DIF
USB 2.0
ATSC
Digital &
Analog
Decoder
H.264, VC1
MPEG4
MPEG2
Decode Unit
Audio
DAC
Dual-Audio
Processing
Unit
Vcc cont.
I
Back Light cont. (BLON)
AV2_LR
Remote
LVDS
Out
Video data & Clk
(LVDS)
+12V
RF-IN
I2
IF
IF_AGC
Digital/
Analog
Back Light level (PWM)
UART(Factory)
DD
XL/
R
Audio
ADC
Power LED
I2C
DDC
DDR2
512Mb
(400MHz)
OP
AMP
USB
Key RC
DDC
HDMI2
HDMI1
(or DVI)
A
I2S
UART(Debug)
Digital Unit
AnalogUnit
AV1_CVBS
Composite
AV2(YPbPr)
IEC958
Component/Composite
PanelUnit
AV1_LR
USB
I2C
HDMI
MUX
Sub CPU
Audio
DSP
AFE
Input
Mux
A/D
Converter
NTSC
Decoder
Graphics
Unit Scaler
Audio
MUX
sLDM
Speaker-
DVI_L/R