S&T kontron COMe-cVR6, User Manual

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COMe-cVR6 – User Guide Rev. 1.5
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Pin Signal Description Type Termination Comment
B54 GPO1 General Purpose Output 1 O-3.3 PD 100k ---
B55 P PCI Express Lane 4 R DP-I --- ---
B56 PCIE_RX4- PCI Express Lane 4 Receive - DP-I --- ---
B57 GPO2 General Purpose Output 2 O-3.3 PD 100k ---
B58 P PCI Express Lane 3 R DP-I --- ---
B59 PCIE_RX3- PCI Express Lane 3 Receive - DP-I --- ---
B60 GND Power Ground PWR GND --- ---
B61 P PCI Express Lane 2 R DP-I --- ---
B62 PCIE_RX2- PCI Express Lane 2 Receive - DP-I --- ---
B63 GPO3 General Purpose Output 3 O-3.3 PD 100k ---
B64 P PCI Express Lane 1 R DP-I --- ---
B65 PCIE_RX1- PCI Express Lane 1 Receive - DP-I --- ---
B66 WAKE0# PCI Express Wake Event I-3.3 PU 10k 3.3V
(S5) ---
B67 WAKE1# General Purpose Wake Event I-3.3 PU 10k 3.3V
(S5) ---
B68 P PCI Express Lane 0 R DP-I --- ---
B69 PCIE_RX0- PCI Express Lane 0 Receive - DP-I --- ---
B70 GND Power Ground PWR GND --- ---
B71 LVDS Channel B DAT0+ DP-O --- ---
B72 LVDS_B0- LVDS Channel B DAT0- DP-O --- ---
B73 LVDS Channel B DAT1+ DP-O --- ---
B74 LVDS_B1- LVDS Channel B DAT1- DP-O --- ---
B75 LVDS Channel B DAT2+ DP-O --- ---
B76 LVDS_B2- LVDS Channel B DAT2- DP-O --- ---
B77 LVDS Channel B DAT3+ DP-O --- ---
B78 LVDS_B3- LVDS Channel B DAT3- DP-O --- ---
B79 LVDS_BKLT_EN LVDS / EDP Panel Backlight On O-3.3 PD 100k ---
B80 GND Power Ground PWR GND --- ---
B81 LV LVDS Channel B Clock+ DP-O --- 20-80MHz
B82 LVDS_B_CK- LVDS Channel B Clock- DP-O --- 20-80MHz
B83 LVDS_BKLT_CTRL LVDS / EDP Backlight Brightness
Control O-3.3 --- ---
B84 VCC_5V_SBY 5V Standby PWR 5V
(S5) --- optional (not
neccessary in
single supply
mode)
B85 VCC_5V_SBY 5V Standby PWR 5V
(S5) --- optional (not
neccessary in
single supply
mode)
B86 VCC_5V_SBY 5V Standby PWR 5V
(S5) --- optional (not
neccessary in
single supply
mode)