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Secure Digital (SD) Card Protocol Description 

 

4-32 

SanDisk Secure Digital (SD) Card Product Manual, Rev. 1.9  © 2003 SANDISK CORPORATION 

4.11.4. Timing Values 

Table 4-17 defines all timing values.  For more information, refer to Table 5-5 and 5.1.9.2 in Section 5.0, and the 
applications note in Appendix A, “Host Design Considerations:  NAND MMC and SD-based Products.”

 

Table 4-17.  Timing Values

 

 

Min. Max. 

Unit 

N

CR

 

2 64 Clock 

Cycles 

N

ID

 

5 5 Clock 

Cycles 

N

AC

 

See note. 

Clock Cycles 

N

RC

 

8 - Clock 

Cycles 

N

CC

 

8 - Clock 

Cycles 

N

WR

 

2 - Clock 

Cycles 

NOTE

: min 

[{(TAAC 

 f ) + (NSAC 

 100)}, {(100ms 

 f)}] where units = (clocks) and “f” is the clock frequency. 

Summary of Contents for SDSDB-32-201-80 - Industrial Grade Flash Memory...

Page 1: ...re Digital Card Product Manual Version 1 9 Document No 80 13 00169 December 2003 SanDisk Corporation Corporate Headquarters 140 Caspian Court Sunnyvale CA 94089 Phone 408 542 0500 Fax 408 542 0503 www...

Page 2: ...istered trademarks of SanDisk Corporation Product names mentioned herein are for identification purposes only and may be trademarks and or registered trademarks of their respective companies 2003 SanD...

Page 3: ...1 5 9 7 Data Transfer Rate 1 9 1 5 9 8 Data Protection in the Flash Card 1 10 1 5 9 9 Erase 1 10 1 5 9 10 Write Protection 1 10 1 5 9 11 Copy Bit 1 10 1 5 9 12 The CSD Register 1 10 1 5 10 SD Card SPI...

Page 4: ...col Description 4 1 4 1 SD Bus Protocol 4 1 4 2 Protocol s Functional Description 4 4 4 3 Card Identification Mode 4 5 4 3 1 Reset 4 6 4 3 2 Operating Voltage Range Validation 4 7 4 3 3 Card Identific...

Page 5: ...n Commands 5 8 5 2 SPI Command Set 5 8 5 2 1 Command Format 5 8 5 2 2 Command Classes 5 9 5 2 2 1 Detailed Command Description 5 9 5 2 3 Responses 5 12 5 2 3 1 Format R1 5 13 5 2 3 2 Format R1b 5 13 5...

Page 6: ...ital SD Card Product Manual Rev 1 9 2003 SANDISK CORPORATION File System Support A 5 Appendix B Ordering Information B 1 Appendix C SanDisk Worldwide Sales Offices C 1 Appendix D Limited Warranty D 1...

Page 7: ...aCard forward compatibility was kept Actually the main difference between SD Card and MultiMediaCard is the initialization process The SD Card specifications were originally defined by MEI Matsushita...

Page 8: ...atures The SD Card provides the following features Up to 1 GB of data storage SD Card protocol compatible Supports SPI Mode Targeted for portable and stationary applications for secured copyrights pro...

Page 9: ...tible with the following SD Card Physical Layer Specification standard The SD Card Physical Layer System Specification Version 1 01 This specification may be obtained from SD Card Association 53 Mucke...

Page 10: ...a space The SD Card s soft error rate specification is much better than the magnetic disk drive specification In the extremely rare case a read error does occur SD Cards have innovative algorithms to...

Page 11: ...he Erase Command The Erase sector or group command provides the capability to substantially increase the write performance of the SD Card Once a sector has been erased using the Erase command a write...

Page 12: ...esses each card separately through its own command lines The SD Card s CID register is pre programmed with a unique card identification number which is used during the identification procedure In addi...

Page 13: ...ck command is sent by the host The size of a block is either programmable or fixed The information about allowed block sizes and the programmability is stored in the CSD The granularity of the erasabl...

Page 14: ...ber Block Size Byte Data Area Protected size Blocks Protected Area size Blocks User Area Blocks SDSDJ 1024 512 2 004 224 20 480 1 983 744 SDSDJ 512 512 1 001 104 10 240 940 864 SDSDJ 256 512 499 456 5...

Page 15: ...length for read operations is limited by the device sector size 512 bytes but can be as small as a single byte Misalignment is not allowed Every data block must be contained in a single physical secto...

Page 16: ...o prevent the host from writing to or erasing data on the card The WP switch does not have any influence on the internal Permanent or Temporary WP bits in the CSD 1 5 9 11 Copy Bit The content of a SD...

Page 17: ...detection methods can be found in SD Physical Specification s Application Notes given by the SDA 1 5 10 3 Card Status In SPI mode only 16 bits containing the errors relevant to SPI mode can be read o...

Page 18: ...tion to the SD Card 1 12 SanDisk Secure Digital SD Card Product Manual Rev 1 9 2003 SANDISK CORPORATION 1 5 10 9 Write Protection Same as in SD Card mode 1 5 10 10 Copyright Protection Same as in SD C...

Page 19: ...Introduction to the SD Card SanDisk Secure Digital SD Card Product Manual Rev 1 9 2003 SANDISK CORPORATION 1 13 This page intentionally left blank...

Page 20: ...Human body model according to ANSI EOS ESD S5 1 1998 8kV coupling plane discharge 15kV air discharge Human body model per IEC61000 4 2 2 2 Reliability and Durability Table 2 2 Reliability and Durabil...

Page 21: ...Products 1 5msec 10msec 100msec 100msec Block Write Access Time Binary Products MLC Products 24msec 40msec 250msec 250msec CMD1 to Ready after power up 50msec 500msec Sleep to Ready 1msec 2msec NOTES...

Page 22: ...6 Physical Specifications Refer to Table 2 6 and to Figures 2 1 through 2 3 for SD Card physical specifications and dimensions Table 2 6 Physical Specifications Weight 2 0 g maximum Length 32mm 0 1mm...

Page 23: ...Product Specifications 2 4 SanDisk Secure Digital SD Card Product Manual Rev 1 9 2003 SANDISK CORPORATION Figure 2 2 SD Card Dimensions...

Page 24: ...Product Specifications SanDisk Secure Digital SD Card Product Manual Rev 1 9 2003 SANDISK CORPORATION 2 5 Figure 2 3 SD Card Dimensions...

Page 25: ...Product Specifications 2 6 SanDisk Secure Digital SD Card Product Manual Rev 1 9 2003 SANDISK CORPORATION This page intentionally left blank...

Page 26: ...CLK I Clock 6 VSS2 S Supply voltage ground 7 DAT0 I O Data Line Bit 0 8 DAT1 I O Data Line Bit 1 9 DAT2 I O Data Line Bit 2 NOTES 1 S power supply I input O output using push pull drivers 2 The extend...

Page 27: ...consumption may occur due to the floating inputs Each card has a set of information registers refer to Table 3 3 Detailed descriptions are provided in Section 3 5 Table 3 3 SD Card Registers Name Widt...

Page 28: ...communication lines and three supply lines CMD Command is a bi directional signal Host and card drivers are operating in push pull mode DAT0 3 Data lines are bi directional signals Host and card driv...

Page 29: ...lify the handling of the card stack after initialization all commands may be sent concurrently to all cards Addressing information is provided in the command packet The SD Bus allows dynamic configura...

Page 30: ...emoval insertion should be detected by the bus master using the CRC codes that suffix every bus transaction 3 2 1 Power Protection Cards can be inserted into or removed from the bus without damage If...

Page 31: ...signal see Figure 3 4 The CS signal must be continuously active for the duration of the SPI transaction command response and data The only exception is card programming time At this time the host can...

Page 32: ...ontains a busy flag indicating that the card is still working on its power up procedure and is not ready for identification This bit informs the host that the card is not ready The host has to wait an...

Page 33: ...voltage differentials VSS1 VSS2 0 3 0 3 V Power up Time 250 mS From 0V to VDD Min 3 4 3 Bus Signal Line Load The total capacitance CL of the CLK line of the SD Card bus is the sum of the bus master ca...

Page 34: ...Bus Signal Levels To meet the requirements of the JEDEC specification JESD8 1A the card input and output voltages shall be within the specified ranges in Table 3 6 for any VDD of the allowed voltage...

Page 35: ...s are referred to min VIH and max VIL Clock Frequency Data Transfer Mode fPP 0 25 MHz CL 100 pF 7 cards Clock Frequency Identification Mode The low frequency is required for MultiMediaCard compatibili...

Page 36: ...figuration information The RCA register holds the card relative communication address for the current session The card status and SD status registers hold the communication protocol related status of...

Page 37: ...its are constant and will be set as described in Figure 4 8 If bit 32 the busy bit is set it informs the host that the card power up procedure is finished Figure 3 8 OCR Structure 3 5 2 Card Identific...

Page 38: ...n is the most significant nibble and the m is the least significant nibble Example The PRV binary value filed for product revision 6 2 will be 0110 0010 The CRC Checksum is computed by the following f...

Page 39: ...vice size multiplier C_SIZE_MULT 3 R 49 47 SD128 64 SD064 32 SD032 32 SD016 32 SD008 16 100b 011b 011b 011b 010b erase single block enable ERASE_BLK_EN 1 R 46 46 Yes 1b erase sector size SECTOR_SIZE 7...

Page 40: ...5 D 6 0 E 7 0 F 8 0 7 Reserved NSAC Defines the worst case for the clock dependent factor of the data access time The unit for NSAC is 100 clock cycles Therefore the maximal value for the clock depen...

Page 41: ...rs READ_BL_PARTIAL 1 means that smaller blocks can be used as well The minimum block size will be equal to minimum addressable unit one byte WRITE_BLK_MISALIGN Defines if the data block to be written...

Page 42: ...URR_MIN The maximum values for read and write currents at the minimal VDD power supply are coded in Table 3 17 Table 3 17 VDD Minimum Current Consumption VDD_R_CURR_MIN VDD_W_CURR_MIN Code For Current...

Page 43: ...up write protection possible R2W_FACTOR Defines the typical block program time as a multiple of the read access time Table 3 20 defines the field format Table 3 20 R2W_FACTOR R2W_FACTOR Multiples of R...

Page 44: ...e file system with partition table 0 1 DOS FAT floppy like with boot sector only no partition table 0 2 Universal File Format 0 3 Others Unknown 1 0 1 2 3 Reserved CRC The CRC field carries the check...

Page 45: ...card vendor dependent SD_SECURITY Describes the security algorithm supported by the card Table 3 26 SD Supported Security Algorithm SD_SECURITY Supported Algorithm 0 No security 1 Security protocol 1...

Page 46: ...A misaligned address that did not match the block length was used in the command C 29 BLOCK_LEN_ERROR E R 0 no error 1 error The transferred block length is not allowed for this card or the number of...

Page 47: ...the internal ECC A 13 ERASE_RESET S R 0 cleared 1 set An erase sequence was cleared before executing because an out of erase sequence command was received C 12 9 CURRENT_STATE S X 0 idle 1 ready 2 ide...

Page 48: ...ed by the SET_BUS_WIDTH command A 509 SECURED_MODE S R 0 not in the mode 1 in secured mode Card is in Secured Mode of operation refer to the SD Security Specifications document A 508 496 Reserved 495...

Page 49: ...essed by the host using the secured read write command after doing authentication as defined in the SD Security Specification The security protected area size is defined by SanDisk as approximately on...

Page 50: ...SD Card Interface Description SanDisk Secure Digital SD Card Product Manual Rev 1 9 2003 SANDISK CORPORATION 3 25 This page intentionally left blank...

Page 51: ...transferred via the data lines From host to card s CMD DAT Command From host to card Command Response From card to host Operation no response Operation no data Figure 4 1 No Response and No Data Opera...

Page 52: ...to card CMD DAT Command Data from card to host Command Response From card to host Block write operation Multiple block write operation Response Data stop operation Data block crc Data block crc Busy...

Page 53: ...R6 protected by 7 bit CRC checksum Transmitter bit 0 card response Total length 48 bits End bt always 1 0 0 Content CID or CSD CRC 1 Total length 136 bits End bt always 1 R1 R3 R6 R2 Figure 4 5 Respo...

Page 54: ...e intended for all SD Cards Some of these commands require a response Addressed Point to Point Commands The addressed commands are sent to the addressed SD Card and cause a response to be sent from th...

Page 55: ...ration modes and card states Each state in the SD Card state diagram Figures 4 7 and 4 8 is associated with one operation mode Table 4 1 Overview of Card States versus Operation Modes Card State Opera...

Page 56: ...process starting at CMD1 SPI Operation Mode CMD0 CS Asserted 0 Figure 4 7 SD Card State Diagram Card Identification Mode 4 3 1 Reset GO_IDLE_STATE CMD0 is the software reset command and sets each SD C...

Page 57: ...SEND_OP_COND command CMD1 of MultiMediaCard The host should ignore an ILLEGAL_COMMAND status in the MultiMediaCard response to CMD3 since it is a residue of ACMD41 which is invalid in the MultiMediaCa...

Page 58: ...ture data transfer mode typically with a higher clock rate than fOD Once the RCA is received the card state changes to the Stand by State At this point if the host wants the card to have another RCA n...

Page 59: ...lative card address 0x0000 all cards transfer back to Stand by State Note that it is the responsibility of the Host to reserve the RCA 0 for card de selection refer to Table 4 3 CMD7 description This...

Page 60: ...ally if the CMD and DAT0 lines of the cards are kept separated and the host keeps the busy DAT0 line disconnected from the other DAT0 lines of the other cards the host may access the other cards while...

Page 61: ...mat The data transfer format is similar to the data read format For block oriented write data transfer the CRC check bits are added to each data block The card performs a CRC check for each data line...

Page 62: ...ill have the old data If the host sends a greater number of write blocks than are defined in ACMD23 the card will erase blocks one by one as new data is received This number will be reset to the defau...

Page 63: ...ed switch on the socket side will indicate to the host that the card is write protected or not It is the responsibility of the host to protect the card The position of the write protect switch is un k...

Page 64: ...tions and may not be used by any SD Card manufacturer ACMD6 ACMD13 ACMD17 25 ACMD38 49 ACMD51 General Command GEN_CMD CMD56 The bus transaction of the GEN_CMD is the same as the single block read or w...

Page 65: ...n regardless of the host clock However the host must provide a clock edge for the card to turn off its busy signal Without a clock edge the SD Card unless previously disconnected by a deselect command...

Page 66: ...xn second bit xn 1 last bit x0 CRC 15 0 Remainder M x x16 G x The first bit is the first data bit of the corresponding block The degree n of the polynomial denotes the number of bits of the data block...

Page 67: ...are card independent either 100 times longer than the typical access times for these operations given below or 100ms The times after which a time out condition for Write Erase operations occur are ca...

Page 68: ...essed point to point Data Transfer Commands adtc data transfer on DAT All commands and responses are sent over the CMD line of the SD Card The command transmission always starts with the left bit of t...

Page 69: ...ses CCCs 0 1 2 3 4 5 6 7 8 9 11 Supported Commands Basic Reserved Block Read Reserved Block Write Erase Write Pro tection Lock Card Appli cation Specific Reserved CMD0 CMD2 CMD3 CMD4 CMD7 CMD9 CMD10 C...

Page 70: ...ddress 0 deselects all When the RCA equals 0 the host may do one of the following use other RCA number to perform card de selection or re send CMD3 to change its RCA number to other then 0 and then us...

Page 71: ...t Applicable CMD27 adtc 31 0 don t care R1 PROGRAM_CSD Programming of the programmable bits of the CSD The bit places must be filled but the value is irrelevant Table 4 6 Write Protection Class 6 Cmd...

Page 72: ...8 Lock Card Commands Class 7 Cmd Index Type Argument Resp Abbreviation Command Description CMD42 CMD54 SDA Optional Commands currently supported by SanDisk SD Card Table 4 9 Application Specific Comm...

Page 73: ...31 23 stuff bits 22 0 Number of blocks R1 SET_WR_BLK_ ERASE_COUNT Set the number of write blocks to be pre erased before writing to be used for faster Multiple Block WR command 1 default one wr block...

Page 74: ...stby tran data rcv prg dis ina Command Changes to Class Independent CRC error command not sup ported Class 0 CMD0 idle idle idle idle idle idle idle idle idle CMD2 ident CMD3 stby stby CMD4 stby CMD7...

Page 75: ...ation ACMD41 card VDD range compatible ready ACMD41 card is busy idle ACMD41 card VDD range not compatible ina ACMD42 tran ACMD51 data class 9 11 CMD41 CMD43 CMD54 CMD57 CMD59 Reserved CMD60 CMD63 Res...

Page 76: ...ponse length 136 bits The content of the CID register is sent as a response to CMD2 and CMD10 The content of the CSD register is sent as a response to CMD9 Only bits 127 1 of the CID and CSD are trans...

Page 77: ...are Data Bits from Card Repeater CRC Cyclic Redundancy Check Bits 7 Bits Card Active Host Active The difference between the P bit and Z bit is that a P bit is actively driven to HIGH by the card respe...

Page 78: ...sponse CMD S T content CRC E Z Z P P S T content CRC E Z Z Z Figure 4 13 Command Response Timing Data Transfer Mode Last Card Response Next Host Command Timing After receiving the last card response t...

Page 79: ...D Figure 4 17 Timing of Multiple Block Read Command Host command NCR cycles Response CMD S T content CRC E Z Z P P S T content CRC E DAT D D D D D D E Z Z Figure 4 18 Timing of Stop Command CMD12 Data...

Page 80: ...n a flash programming error occurs the card will ignore all further data blocks In this case no CRC response will be sent to the host and therefore there will not be CRC start bit on the bus and the t...

Page 81: ...onse Host Cmnd CMD S T content CRC E Z Z P P S T content CRC E S T Content Card is programming DAT S L L E Z Z Z Z Z Z Z Z Figure 4 23 Stop Transmission Received After Last Data Block Card is Busy Pro...

Page 82: ...rmation refer to Table 5 5 and 5 1 9 2 in Section 5 0 and the applications note in Appendix A Host Design Considerations NAND MMC and SD based Products Table 4 17 Timing Values Min Max Unit NCR 2 64 C...

Page 83: ...yte 1 5 1 1 Mode Selection The SD Card wakes up in the SD Bus mode It will enter SPI mode if the CS signal is asserted negative during the reception of the reset command CMD0 If the card recognizes th...

Page 84: ...ata Read SPI mode supports single block and multiple block read operations SD Card CMD17 or CMD18 Upon reception of a valid read command the card will respond with a response token followed by a data...

Page 85: ...ery data block has a prefix or start block token one byte After a data block is received the card will respond with a data response token and if the data block is received with no errors it will be pr...

Page 86: ...s the host s responsibility to prevent it 5 1 5 Erase and Write Protect Management The erase and write protect management procedures in the SPI mode are identical to the SD Bus mode While the card is...

Page 87: ...completed its initialization processes and is ready for the next command In SPI mode however CMD1 has no operands and does not return the contents of the OCR register Instead the host can use CMD58 SP...

Page 88: ...1 CRC and Illegal Commands Unlike the SD Card protocol in SPI mode the card will always respond to a command The response indicates acceptance or rejection of the command A command may be rejected in...

Page 89: ...SPI Protocol Definition SanDisk Secure Digital SD Card Product Manual Rev 1 9 2003 SANDISK CORPORATION 5 7...

Page 90: ...ll be order of magnitude the number of write blocks WRITE_BL to be erased multiplied by the block write delay 5 1 10 Memory Array Partitioning Same as for SD Card mode 5 1 11 Card Lock Unlock The Card...

Page 91: ...Card CMD Class CCC Class Description Supported Commands 0 1 9 10 12 13 16 17 18 24 25 27 28 29 30 32 33 38 42 55 56 58 59 class 0 Basic class 1 Not supported in SPI class 2 Block read class 3 Not sup...

Page 92: ...read write 1 CMD17 Yes 31 0 data address R1 READ_SINGLE _BLOCK Reads a block of the size selected by the SET_BLOCKLEN command 2 CMD18 Yes 31 0 data address R1 READ_MULTIPLE _BLOCK Continuously transf...

Page 93: ...the last write block in a continuous range to be erased CMD34 CMD37 Reserved CMD38 Yes 31 0 don t care R1b ERASE Erases all previously selected write blocks CMD39 No CMD40 No CMD41 CMD54 Reserved CMD5...

Page 94: ...rite blocks to be pre erased before writing to be used for faster Multiple Block WR command 1 default one wr block 2 ACMD24 Reserved ACMD25 Yes Reserved for SD security applications1 ACMD26 Yes Reserv...

Page 95: ...error in the sequence of erase commands occurred Address error A misaligned address which did not match the block length was used in the command Parameter error The command s argument e g address bloc...

Page 96: ...lid selection sectors for erase Write protect violation The command tried to write a write protected block Card ECC failed Card internal ECC was applied but failed to correct the data CC error Interna...

Page 97: ...te Error response 110 the host may send CMD13 SEND_STATUS in order to get the cause of the write problem ACMD22 can be used to find the number of well written write blocks 5 2 4 Data Tokens Read and w...

Page 98: ...10 Data Error Token The four least significant bits LSB are the same error bits as in response format R2 5 2 6 Clearing Status Bits As described in the previous paragraphs in SPI mode status bits are...

Page 99: ...nd to Card Response Card is Busy The following timing diagram describes the command response transaction for commands when the card responses which the R1b response type e g SET_WRITE_PROT and ERASE W...

Page 100: ...and bus transaction The timeout values for the response and the data block are NCR Since the NAC is still unknown CS H L L L L L L H H H H NCS NEC DataIN X H H H H Read Command H H H H H H H H X X X X...

Page 101: ...ng Values Table 5 5 shows the timing values and definitions For more information refer to Table 4 17 in Section 4 0 Section 5 1 9 2 and the applications note in Appendix A Host Design Considerations N...

Page 102: ...SPI Protocol Definition 5 20 SanDisk Secure Digital SD Card Product Manual Rev 1 9 2003 SANDISK CORPORATION This page intentionally left blank...

Page 103: ...s timing specifications If they want to support MultiMediaCards in their design the clock speed should be controllable by the host This is due to the MultiMediaCard s open drain mode the MultiMediaCar...

Page 104: ...anufacturer products The SD Card also supports a 4 bit and a 1 bit SD bi directional bus mode SD bus pins are CLK CMD and DAT in 1 bit mode and CLK CMD and DAT 0 3 in 4 bit mode The MultiMediaCard als...

Page 105: ...SanDisk Secure Digital SD Card Product Manual Rev 1 9 2003 SANDISK CORPORATION A 3 The example in Table 3 shows the difference between moving 512 bytes of data to and from a MultiMediaCard or SD Card...

Page 106: ...and recommended mode The more blocks that can be written in Multiblock mode the better the performance of the design Therefore when planning the design ensure that enough system RAM is designed in to...

Page 107: ...writing to an SD Card and MultiMediaCard is generally done in 512 byte blocks however erasing often occurs in much larger blocks The NAND architecture used by SanDisk and other card vendors currently...

Page 108: ...SANDISK CORPORATION B 1 Appendix B Ordering Information To order SanDisk products directly from SanDisk call 408 542 0595 Secure Digital Card SDSDB 16 16 MB SDSDB 32 32 MB SDSDJ 64 64 MB SDSDJ 128 12...

Page 109: ...count Sales 32500 Mills Rd Avon OH 44011 Tel 440 327 0490 Fax 440 327 0295 International Retail Sales European Retail Sales Wilhelminastraat 10 2011 VM Haarlem The Netherlands Tel 31 23 5514226 Fax 31...

Page 110: ...SanDisk Worldwide Sales Offices C 2 SanDisk Secure Digital SD Card Product Manual Rev 1 9 2003 SANDISK CORPORATION This page intentionally left blank...

Page 111: ...nd to be defective within one year of purchase SanDisk will have the option of repairing or replacing the defective product if the following conditions are met A The defective product is returned to S...

Page 112: ...fect conditions of use proof of purchase and purchase date If approved SanDisk will issue a Return Material Authorization or Product Repair Authorization number Ship the defective product to SanDisk C...

Page 113: ...here failure could cause damage injury or loss of life the products should only be incorporated in systems designed with appropriate redundancy fault tolerant or back up features SanDisk shall not be...

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