Ubigate iBG1000 System Description/Ed.02
© SAMSUNG Electronics Co., Ltd.
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Ubigate iBG1000 Boot Sequence
All circuitry within Ubigate iBG1000 is reset to its initial state by the reset
circuitry on the main board.
During normal operation, the reset circuitry monitors an internal power supply
of the main board and, after it reaches a normal operating level, generates a
reset pulse to the routing processor and all of the other circuitry on the main
board.
The main board reset circuitry also includes a watchdog timer. The watchdog
timer causes Ubigate iBG1000 reset if the programmed interval elapses
without the processor triggering the watchdog.
Ubigate iBG1000 boot is the sequence of software-driven events starting from
the reset pulse to the loading and running of the application image. On reset,
the processor starts executing instruction from a specific location in the boot
ROM. This first software run is the boot loader. After CPU memory controller
initialization, the boot loader locates, verifies, and runs a boot image located
in the internal flash storage. The boot image then continues with the necessary
initialization, decompresses, and moves itself to RAM. Once the boot image is
moved to RAM, control is given to boot software residing in RAM. At this
point the additional initialization of hardware and driver software is performed
before SNOS (Samsung Network Operating System) can be loaded onto RAM
from flash. The SNOS software prepares Ubigate iBG1000 for forwarding
packets through the interfaces at which time Ubigate iBG1000 is fully up and
running.
There are various software services that support the application software.
These include a file system, logging, monitoring, validation of downloaded
image and flash update.
