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SGH-D730 Flow Chart of Troubleshooting and Circuit Diagrams
2-
7
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OSC401
VRTC
R413
DSP_TDI
TP405
TP403
R416
VCCD
TP407
VDD_18D
R414
VCCB
R410
C407
R441
R440
VDD_30D
C422
DSP_TMS
D12
0
1
F
F
E
R
V
X
C411
XPA6/BE1N
XPA7/IRQ1
M9
T5
XPA8/IRQ2
XPA9/IRQ3
P2
1
M
W
P
X
5
R
XRTCALARM_N
E8
K
L
C
_
0
M
S
X
01
N
21
U
A
T
A
D
_
0
M
S
X
XTIC_MODE
N0
S
C
_
2
3
A
P
X
71
N
A
Q
E
R_
T
_
3
3
A
P
X
B
Q
E
R_
T
_
4
3
A
P
X
71
M
22
A_
5
3
A
P
X
3
1
L
5
1
N
N5
S
C
_
3
2
A_
6
3
A
P
X
XPA3/CS4N
N14
XPA4/OEN
P16
XPA5/WAITN
P15
T15
0
M
O
_
5
2
A
P
X
1
M
O
_
6
2
A
P
X
2
G
4
G
K
L
C_
1
M
S
_
7
2
A
P
X
0
M
OI
_
8
2
A
P
X
5
G
1
M
OI
_
9
2
A
P
X
1
F
M11
XPA2/CS3N
3
F
0
MI
_
0
3
A
P
X
1
MI
_
1
3
A
P
X
1
E
4
1
H
I
S
O
M
_
P
C/
9
1
A
P
X
2L
M14
XPA1/CS2N
1L
O
SI
M
_
P
C/
0
2
A
P
X
4
K
K
C
S
_
P
C/
1
2
A
P
X
N
S
S/
2
2
A
P
X
6J
6
H
2
M
W
P/
3
2
A
P
X
3
M
W
P/
4
2
A
P
X
5
H
3
M
X
R
A
D
RI/
1
1
A
P
X
5
K
1
N
X
T
A
D
RI/
2
1
A
P
X
1
X
T
_
3
1
A
P
X
6
G
3
G
1
X
R
_
4
1
A
P
X
0
X
T/
5
1
A
P
X
4
H
3L
0
X
R/
6
1
A
P
X
0
Q
R
D
_
7
1
A
P
X
4
E
K
C
A_
T
_
8
1
A
P
X
31
P
7
D
O
D
T_
P
C
X
31
D
S
M
T
_
P
C
X
8
G
9
F
N
T
S
R
T_
P
C
X
C13
XCP_WEN
4
F
B
T
S
R
F
X
C6
XOSC32OUT
XPA0/CS1N
M15
N2
XPA10/IRQ4
1
T
3
NI
S/
3
B
K
_
P
C
X
2
R
4
NI
S/
4
B
K
_
P
C
X
0
T
U
O
S/
5
B
K
_
P
C
X
3
T
1
T
U
O
S/
6
B
K
_
P
C
X
3
U
2
T
U
O
S/
7
B
K
_
P
C
X
3
P
3
T
U
O
S/
8
B
K
_
P
C
X
4
T
3
N
4
T
U
O
S/
9
B
K
_
P
C
X
K
C
T
_
P
C
X
XCP_D6
E7
D5
XCP_D7
C4
XCP_D8
XCP_D9
B4
7
C
I
D
T_
P
C
X
0
NI
S/
0
B
K
_
P
C
X
4L
1
NI
S/
1
B
K
_
P
C
X
5L
2
NI
S/
2
B
K
_
P
C
X
4
M
XCP_D11
XCP_D12
C2
D2
XCP_D13
D3
XCP_D14
XCP_D15
E3
F8
XCP_D2
XCP_D3
F7
C5
XCP_D4
XCP_D5
D6
XCP_A8
B17
C17
XCP_A9
A13
XCP_CSRAMEN
XCP_CSROMEN
A12
XCP_D0
A6
B5
XCP_D1
XCP_D10
B3
C1
XCP_A2
E14
XCP_A20
L15
L16
XCP_A21
D15
XCP_A3
B15
XCP_A4
XCP_A5
C14
A16
XCP_A6
XCP_A7
A15
XCP_A12
G14
G13
XCP_A13
XCP_A14
G17
J12 XCP_A15
K12
XCP_A16
XCP_A17
K13
K14
XCP_A18
XCP_A19
L14
A11
XAG2
E11
D11
XAG3
XBSWN
B7
XCPTSTSTOP_CKO
M12
B13 XCP_A0_BEON
F11
XCP_A1
D16
XCP_A10
XCP_A11
F14
1
1
H
7J
S
S
V
6
K
S
S
V
01
E
A
S
S
V
51
E
LL
P
D
_
S
S
V
X1RTC
A7
D10
X2RTC
B11
XAG0
XAG1
1
1J
S
S
V
S
S
V
9
L
3
A
S
S
V
6
F
S
S
V
S
S
V
9
G
01
G
S
S
V
S
S
V
7
H
S
S
V
LL
P
D
_
D
D
V
61
G
C
T
R
V
8
D
S
S
V
2
A
S
S
V
7
K
S
S
V
6
L
0
1
L
S
S
V
S
S
V
7
M
8
L
S
S
V
41
B
E
D
D
V
1
M
2
U
E
D
D
V
E
D
D
V
8
P
5
1
U
E
D
D
V
E
D
D
V
6
1
U
6
1
N
E
D
D
V
E
D
D
V
61
E
71
E
E
D
D
V
D
D
V
3
1
T
6
1
R
D
D
V
D
D
V
7
1
R
5
A
D
D
V
D
D
V
6
1
C
A
D
D
V
1
1
C
1
B
E
D
D
V
E
D
D
V
H12
F12
TDO
G12
TMS
TRST
F15
D
D
V
2
E
7
1
L
D
D
V
1
G
D
D
V
D
D
V
1
R
4
R
D
D
V
IO7
IOBIT#1
K11
IOBIT#2
L12
C
N
1
2
C
N
B
T
S
R
2
1
C
RWN
U5
TCK
H13
TDI
U7
DB#4
T7
DB#5
DB#6 R7
M6
DB#7
P7
DB#8
DB#9
N7
N4
INT#0
R12
DB#1
DB#10
N8
M8
DB#11
DB#12
U11
T11
DB#13
R11
DB#14
DB#15
P10
R6
DB#2
DB#3
P6
P12
AB#5
AB#6 R14
AB#7
T14
T17
AB#8
7
1
F
I
K
C
G15
CKO
DB#0
P5
U6
U400
U13
AB#0
AB#1
M10
R13
AB#2
N11
AB#3
AB#4
P11
R404
DSP_TDO
VCCD
C424
C423
VS
1
R407
U402
GND
3
2 VO
C406
R402
DSP_TCK
TP404
R408
VDD_18D
R415
VDD_18D
VBAT
R403
R409
TP406
VCCD
C410
SVC_BLUE
PH_PWR_OFF
CLK32K
JACK_SENSE
BP_VF
DSP_AB(8)
ARM_TRSTN
UP_SCLK
UP_CS
FLASH_RESET
VREF
CP_CSROM2EN
SW_RST_INT
A(23)
BT_REQ
SIMRST
T
C
E
T
E
D_
C
L
D
RTC_nALARM
TR_RST
ARM_TCK
DSP_DB(0:15)
D(0:15)
A(0:20)
A(21)
AT_nRTS
DSP_AB(0:8)
UP_SDI
UP_SDO
ARM_TDO
ARM_TRSTN
ARM_TDI
ARM_TMS
PH_WAKEUP
AT_nDTR
PH_OFF_nRDY
AT_nDSR
PWR_KEEP
AT_TXD
AT_nCTS
PDA_WAKEUP
SDS_TXD
CP_INT
PDA_ACTIVE
AT_RXD
SDS_RXD
SIMDATA
SIMCLK
PH_ACTIVE
DSP_IO
DSP_RWN
DSP_INT
TR_RST
CLK13M_TR
DSP_DB(12)
DSP_DB(13)
DSP_DB(14)
DSP_DB(15)
DSP_DB(2)
DSP_DB(3)
DSP_DB(4)
DSP_DB(5)
DSP_DB(6)
DSP_DB(7)
DSP_DB(8)
DSP_DB(9)
A(22)
CP_CSROMEN
CP_CSRAMEN
CP_WEN
CP_OEN
UPPER_BYTE
A(20)
A(3)
A(4)
A(5)
A(6)
A(7)
A(8)
A(9)
D(0)
D(1)
D(10)
D(11)
D(12)
D(13)
D(14)
D(15)
D(2)
D(3)
D(4)
D(5)
D(6)
D(7)
D(8)
D(9)
DSP_DB(0)
DSP_DB(1)
DSP_DB(10)
DSP_DB(11)
DSP_AB(0)
DSP_AB(1)
DSP_AB(2)
DSP_AB(3)
DSP_AB(4)
DSP_AB(5)
DSP_AB(6)
DSP_AB(7)
A(0)
A(1)
A(10)
A(11)
A(12)
A(13)
A(14)
A(15)
A(16)
A(17)
A(18)
A(19)
A(2)
