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SGH-D730 Flow Chart of Troubleshooting and Circuit Diagrams
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34
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R707
C707
5
S
S
V
1
A
S
S
V
4
F
4
H
2
A
S
S
V
3
A
S
S
V
1
D
1
G
4
A
S
S
V
5
A
S
S
V
2
G
3
F
6
A
S
S
V
E1
XTALM
XTALP|FAST_CLK_IN E2
TP701
VDD_IO1 D8
G7
VDD_IO2_1
A3
VDD_IO2_2
H8
VDD_IO_SF1
VDD_IO_SF2 B3
VLDO_OUT G5
8
B
1
S
S
V
2
S
S
V
8
G
7
H
3
S
S
V
4
S
S
V
5
A
2
A
RFIO_LDO_OUT F2
RFM H2
H1
RFP
SLOW_CLK_IN F6
G4
TL_LDO_OUT
A8
TX_DBG
VBAT H6
C2
VDD_IN_ANA
F5
VDD_IN_BB
VDD_IN_OSC H3
VDD_IN_RFIO F1
C8 IO7
JTAG_TCK
D4
C3 JTAG_TDI
JTAG_TDO
E6
JTAG_TMS
B5
KA_OUT G6
NC1
1
NC2
2
E3
NSHUT_DOWN
OSC_LDO_OUT G3
E7
HCI_RTS
E4
HCI_RX
HCI_TX
E5
D7
IO0|EXT_CLK_REQ_OUT
B4 IO14
F7
IO15
IO1|EXT_CLK_REQ_IN
C6
B7 IO2|SCL
IO3|SDA
D5
A6 IO4
IO5
C4
B6
A7
AUD_FSYNC
C5
AUD_IN
AUD_OUT
C7
F8
BB_LDO_OUT1
H5
BB_LDO_OUT2
A4
BB_LDO_OUT3
BGAP_I A1
B1
BGAP_V
D6
EMRST
HCI_CTS
E8
U700
B2
ANATEST1
C1
ANATEST2
ANA_LDO_OUT D2
AUD_CLK
R716
L701
R703
TP700
R717
C710
R702
C709
C714
TP702
VDD_30D
C706
R715
C711
L703
VDD_30D
R708
C704
AN700
U702
BLANCE
3
4
BLANCE
2
DC
G
5
6
G
1
IN
BT_RXD
RFIO_LDO_OUT
BT_DIN
RFIO_LDO_OUT
BT_TXD
BT_CTS
XTALINM
XTALINP
BT_BCLK
BT_SYNC
BT_DOUT
CLK32K_OMAP
BT_RTS
BT_nSHDN
OSC700
1
D
N
G
2
4
2
D
N
G
1
T
O
H
T
O
H
3
C713
C712
C708
XTALINP
XTALINM