Samsung SDC-30, Service Manual

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Reference Information
2-8 Samsung Electronics
- Mode change: When the mode is input by the PC key (or main body), 4-bit MICOM signals the RISC. When
the mode is changed, 4-bit MICOM displays it on LCD, and changes the RISC to standby mode.
- Delete execution: When the delete instruction is input by the PC key (or main body), 4-bit MICOM signal the
RISC and changes the RISC to standby mode.
- LCD display: DSC status is displayed.
- Error handling: When an error occurs, (or RISC) the error message is displayed on LCD. If the RISC cannot
operate, the power is automatically off.
- Battery operation: The capacity of battery is classified as "Full", "Half", "Low", or "Battery replacement". For the
"Battery replacement" status, only the power on/off function is available, and other functions cannot operate.
- Auto power OFF: When any operation has not been executed (three minutes for main body operation, or
10 minutes for PC operation) the power automatically turns off.
3. Main functions of RISC processor
- Communication with 4-bit MICOM: RISC operation is completely controlled by the 4-bit MICOM.
A synchronization method is adapted for communication between 4-bit MICOM and RISC (with 8-bit*11 byte
communication).
- DRAM control: RISC processor includes internal BSC. BSC helps RISC to control the DRAM. RISC uses DRAM
as though it were internal RAM (with the help of BSC). BSC generates all DRAM control signals by itself. RISC
uses DRAM for the image buffer, temp memory for the calculation, and an area that manages the flash
memory and FAT(File Allocation Table).
- Camera Head control: RISC handles the control of the camera head during the shot. RISC controls the timing
generator, ASIC, etc. so that the image data from CCD can be transferred.
- Signal processing: RISC executes the signaling processing internally with CCD image data stored in DRAM.
After RISC separates CCD data into RGB, and processes detail and gamma, it creates a YUV signal, and
executes JPEG compression. The compressed JPEG data will be stored in DRAM again.
- Flash memory control: The compressed data (in DRAM) is stored in the flash memory. The file management
program is recorded in RISC, and manages the files in the flash memory (file location, file size, etc).
- PC communication: RISC processor receives the signal from PC (4-bit MICOM) and activates up RISC.
Then, RISC processor sets the flag for the request input from PC, and transfers the flag to RISC. The RISC
communicates with PC through the serial port. (PC always requests the PC communication to DSC, but RISC
does not request it from the PC.)
- Battery level checking: Battery indicator, which is displayed in LCD of 4-bit MICOM, accepts the data from
RISC. Battery level checking is executed when the camera head and main board are on. When new battery is
inserted, it outputs 6.2V; but the actual voltage drops below 6V after supplying power to the camera head and
main board.