SMDK-C100_USER’S MANUAL_REV 0.2
4.1 PLL CLOCK SOURCE SELECTION
EXTCLK or X-TAL can be selected for the S5PC100X system clock by setting the XOM[0] values.
The Clock Source selection must be X-tal Clock (CFG2[1] on CPU Board).
Description
CFG2[1] , (XOM[0])
X-tal Clock (12 ~20MHz)
OFF (Logic “0”)
External Oscillator Clock (USB Clock)
ON (Logic “1”)
4.2 BOOT MODE SELECTION
4.2.1 Switch Configuration
A. Set CFG2 on CPU board to select Internal ROM Boot
CFG2[5:1]
* CFG2[6] : N.C
Description
[5] [4] [3] [2] [1]
Internal ROM Boot for NAND Flash
OFF
OFF
OFF
OFF
OFF
Internal ROM Boot for OneNAND
OFF
OFF
OFF
ON
OFF
Internal ROM Boot for Movi / i-NAND
OFF
OFF
ON
OFF OFF
Internal ROM for (NOR)
OFF
OFF
ON
ON
OFF
NOR FLASH (1
st
& 2
ND
BOOT)
OFF
ON X X
OFF
B. Set CFG3 on CPU board to select
CFG3[4:1]
Description
[4] [3] [2] [1]
☞
Case 1 : CFG2 : Internal ROM Boot for NAND Flash
NAND Flash, 512-byte page,
3 Addr. Cycle
OFF
OFF
OFF
OFF
Normal NAND, 512-byte page,
4 Addr. Cycle
OFF
ON
OFF OFF
Large Page NAND, 2K-byte page,
4 Addr. Cycle
OFF
OFF
ON
OFF
Large Page NAND, 2K-byte page,
5 Addr. Cycle
OFF
OFF
ON
OFF
Large Page NAND, 4K-byte page,
4 Addr. Cycle
OFF
ON ON ON
Large Page NAND, 4K-byte page,
5 Addr. Cycle
OFF
ON ON ON
☞
Case 2 : CFG2 : Internal ROM Boot for Movi / i-NAND
Movi-NAND (MMC)
OFF
X X
OFF
i- NAND (SD)
OFF
X X
ON
CFG[6:5]
Description
[6] [5]
ECC Encryption
x OFF
No ECC Encryption
x ON
Summary of Contents for S5PC100X
Page 8: ...SMDK C100_USER S MANUAL_REV 0 2 Figure 1 S5PC100X Functional Block Diagram ...
Page 16: ...SMDK C100_USER S MANUAL_REV 0 2 Figure 9 S5PC100X CPU BOARD POWER DISTRIBUTION TREE ...
Page 36: ...SMDK C100_USER S MANUAL_REV 0 2 Figure 23 TFT LCD CONNECTOR ...
Page 44: ...SMDK C100_USER S MANUAL_REV 0 2 5 3 2 HOST MODEM INTERFACE Figure 7 HOST MODEM INTERFACE ...
Page 46: ...SMDK C100_USER S MANUAL_REV 0 2 5 3 4 MODULE1 FOR GPS DAUGHTER BOARD Figure 9 MODULE1 For GPS ...
Page 50: ...SMDK C100_USER S MANUAL_REV 0 2 Figure 14 2 2 inch QVGA LCD I F ...