S3F84B8_UM_REV 1.00
10 BASIC TIMER
10-2
10.2 BASIC TIMER CONTROL REGISTER (BTCON)
The basic timer control register, BTCON, selects the input clock frequency to clear the basic timer counter and
frequency dividers and enable (or disable) the watchdog timer function.
A reset clears BTCON to “00H”. This enables the watchdog function to select a basic timer clock frequency of
f
OSC
/4096. To disable the watchdog function, you must write the signature code “1010B” to basic timer register
control bits, BTCON.7–BTCON.4.
The 8-bit basic timer counter, BTCNT, can be cleared during normal operation by writing a “1” to BTCON.1. To
clear the frequency dividers for basic timer input clock, write a “1” to BTCON.0.
.7
.6
.5
.4
.3
.2
.1
.0
LSB
MSB
Basic Timer Control Register (BTCON)
D3H, Set1, R/W
Watchdog timer enable bits:
1010B = Disable watchdog function
Other value = Enable watchdog function
Basic timer counter clear bits:
0 = No effect
1 = Clear basic timer counter
Basic timer input clock selection bits:
00 = fxx/4096
01 = fxx/1024
10 = fxx/128
11 = Invalid selection
Divider clear bit for basic
timer
0 = No effect
1 = Clear both dividers
NOTE:
When you write a 1 to BTCON.0 (or BTCON.1), the basic timer
divider (or basic timer counter) is cleared. The bit is then cleared
automatically to 0.
Figure 10-1 Basic Timer Control Register (BTCON)
