Schematic Diagram
Samsung Electronics
7-7
10BIT SEQUENTIAL MODE [B0/B1]
D[7]
9E/9F
9C/9D
DEL
]7
2[
D
]8
2[
D
]9
2[
D
]5
2[
D
]6
2[
D
]3
2[
D
]1
2[
D
]0
2[
D
]4
2[
D
]9
1[
D
]6
1[
D
]5
1[
D
]8
1[
D
]7
1[
D
]1
1[
D
]2
1[
D
]0
1[
D
D[1]
D[3]
D[4]
D[5]
D[6]
D[8]
D[2]
D[0]
]9
[D
]4
1[
D
]2
2[
D
RGB 4:4:4 = [0x04/0x01], w RB SWAP
YCbCr 4:4:4 = [0x14/0x01], w RB SWAP
YCbCr 4:2:2 = [0x24/0x00], wo RB SWAP
]3
1[
D
3.3V(250mA), 1.8V(200mA)
2
1
C616
2
1
C505
2
1
C502
2
1
C501
BD501
BD502
13
5R
23
5R
10
5R
R509
R508
R506
R507
R505
C528
R528
C527
C526
C524
C525
R527
R526
R525
R524
R521
R522
R523
R519
R520
R516
R517
R518
R515
R514
R513
C504
R512
C523
C522
C521
C520
C519
C514
C515
C516
C517
C518
R511
C511
C512
C513
C509
C510
C508
R529
X501
20
5R
33
5R
43
5R
30
5R
40
5R
13
5C
C532
43
5C
53
5C
73
5C
83
5C
R510
C503
BD503
C507
C506
C529
R530
03
5C
33
5C
63
5C
C539
C546
BD504
C544
C543
R547
R546
R536
C542
C541
C540
R544
R545
R542
R543
R541
R539
R540
R537
R538
C547
3
2
1
IC502
2
1
C550
54
5C
BD505
R535
99
98
97
96
95
94
93
92
91
90
9
89
88
87
86
85
84
83
82
81
80
8
79
78
77
76
75
74
73
27
17
07
7
96
86
76
66
56
46
36
26
16
06
6
95
85
75
65
55
45
35
25
15
05
5
94
84
74
64
54
44
34
24
14
04
4
93
83
73
36
35
34
33
32
31
30
3
29
28
27
26
25
24
23
22
21
20
2
19
18
17
16
15
44
1
34
1
24
1
14
1
04
1
14
93
1
83
1
73
1
63
1
53
1
43
1
33
1
23
1
13
1
03
1
13
92
1
82
1
72
1
62
1
52
1
42
1
32
1
22
1
12
1
02
1
12
91
1
81
1
71
1
61
1
51
1
41
1
31
1
21
1
11
1
01
1
11
90
1
108
107
106
105
104
103
102
101
100
10
1
IC501
MST336CCLK-LF-170
10V
100NF
DVI_VSYNC
DVI_HSYNC
DVI_DE
DVI_CLK
25V
COMP1_Y
COMP1_PB
1KOHM
10KOHM
47NF
25V
100NF
MST_1.8V
14.31818MHZ
X_TAL_CHIP
47NF 25V
47NF
47NF 25V
47NF 25V
47NF 25V
47NF 25V
47NF 25V
25V
47NF 25V
47NF 25V
47NF 25V
47NF
10V
10UF
10V
10UF
10UF
10V
10UF
10V
10UF
10V
10UF
10V
10UF
B3.3V
MST_1.8V
MST_VDDC
B3.3V
MST_VMPLL
B3.3V
MST_AVDD18
B3.3V
MST_VDDP
MST_VDDP
MST_1.8V
MST_AVDD33
1KOHM
100OHM
MST_PRSTO
MH
O3
3
MH
O3
3
33OHM
COMP2_PR
33OHM
33OHM
COMP2_PB
33OHM
33OHM
COMP1_PR
33OHM
33OHM
PC_RED
33OHM
33OHM
PC_BLUE
MH
O3
3
MH
O3
3
33OHM
33OHM
33OHM
33OHM
33OHM
33OHM
2.2KOHM
68OHM
68OHM
68OHM
390OHM
1%
10KOHM
10KOHM
MH
O3
3
MH
O3
3
MH
O3
3
MH
O3
3
33OHM
33OHM
BEAD_CHIP
BEAD_CHIP
BEAD_CHIP
BEAD_CHIP
BEAD_CHIP
HDMI_I2S_LRCLK
220PF
25V
100NF
25V
25V
100NF
10OHM
SCL_MAIN
10OHM
SDA_MAIN
10OHM
10OHM
HDMI_I2S_DATA
10OHM
10OHM
HDMI_I2S_SCLK
10OHM
SPDIF_IN_BAY
10OHM
HDMI_MCLK
25V
25V
MST_ROUT<0..9>
100NF
APL1117-18UC-TRL
100NF
390OHM
390OHM
390OHM
22PF
50V
22PF
50V
50V
1NF 50V
1NF 50V
1NF
50V
33PF 50V
100NF
FN
00
1
V5
2
100NF
FN
00
1
V5
2
FN
00
1
V5
2
FN
00
1
V5
2
FN
00
1
V5
2
100NF
100NF
FN
00
1
V5
2
FN
00
1
V5
2
FN
00
1
V5
2
100NF
100NF 25V
100NF
100NF
25V
FN
00
1
V5
2
COMP2_Y
HDMI2_DDC_SCL
HDMI2_DDC_SDA
HDMI3_RX2-
HDMI3_RXCLK-
HDMI
HDMI3_RX0-
HD
HDMI3_RX1-
HD
HD
HDMI3_DDC_SCL
HDMI3_DDC_SDA
HDMI1_RX2-
HD
HD
HD
HDMI1_RX0-
HDMI1_RXCLK-
HDMI1_DDC_SCL
HDMI
HDMI1_DDC_SDA
HDMI1_RX1-
HDMI2_RX1-
HD
HDMI2_RX2-
HD
HD
HDMI2_RX0-
HDMI2_RXCLK-
HDMI
PC_V_SYNC
PC_GREEN
MST_NINT
MST_BOUT<0..9>
MST_GOUT<0..9>
PC_H_SYNC
9 8 7 6 5 4
3 2 1 0
9 8 7 6 5 4
3 2 1 0
9
8
7
6
5
4
3
2
1
0
VIN VOUT
ADJ
AUSD
NC
NC
NC
GPIO/CEC
VDDC
DDCDC_SDA
DDCDC_SCL
SPDIFO/CEC
MCKO
AUMUTE
AUWS
NK
CA
XR
81
_D
DV
A
DN
G
DDCDA_SCL
]3
1[
AT
AD
]4
1[
AT
AD
]5
1[
AT
AD
]6
1[
AT
AD
]7
1[
AT
AD
PD
DV
]1
1[
AT
AD
CE
C/
DL
EI
F
CD
DV
DN
G
PD
DV
]2
1[
AT
AD
DATA[5]
VDDP
DATA[6]
DATA[7]
N2
BX
R
33
_D
DV
A
P1
BX
R
N1
BX
R
DN
G
P0
BX
R
DN
G
P0
CX
R
N0
CX
R
PK
CC
XR
NK
CC
XR
DN
G
TX
ER
33
_D
DV
A
P2
CX
R
N2
CX
R
DATA[8]
DATA[9]
DATA[10]
VDDP
DATA[0]
DATA[1]
DATA[2]
DATA[3]
DATA[4]
GND
VDDP
VSOUT
HSOUT
SOGOUT/DE
DATACK
AUSCK
]0
3[
AT
AD
PD
DV
]9
2[
AT
AD
]8
2[
AT
AD
]7
2[
AT
AD
]6
2[
AT
AD
CN CN
]5
3[
AT
AD
]4
3[
AT
AD
]3
3[
AT
AD
]2
3[
AT
AD
HWRESET
A0
SCL
SDA
DDCDA_SDA
GND
VDDP
P1
AX
R
N1
AX
R
DN
G
P0
AX
R
N0
AX
R
PK
CA
XR
N0
BX
R
PK
CB
XR
NK
CB
XR
P2
AX
R
N2
AX
R
33
_D
DV
A
P2
BX
R
HSYNC1
VSYNC1
BIN1P
BINN
SOGIN1
GIN1P
VSYNC0
AVDD_33
GND
BIN0P
SOGIN0
GIN0P
DDCDB_SDA
VREFP
VREFN
HSYNC0
DN
G
P1
CX
R
N1
CX
R
]2
2[
AT
AD
]1
2[
AT
AD
]0
2[
AT
AD
]9
1[
AT
AD
]8
1[
AT
AD
LC
S_
BD
CD
D
]5
2[
AT
AD
]4
2[
AT
AD
PD
DV
DN
G
CD
DV
]3
2[
AT
AD
]1
3[
AT
AD
GND
VDDP
INT
RIN2P
AVDD_33
GND
AVDD_MPLL
XOUT
XIN
GINN
RIN1P
RINN
BIN2P
SOGIN2
GIN2P
RIN0P
7-3-5 Main Board-5
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