Samsung GT-B3410, Service Manual

Page: 67 / 70

SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
SIM
REV 0.1
Document Number
PV 3rd
RXD2, CTS2, TXD2, RXD2
GT-B3410 ( Delphi )
J-TAG_BD
Sheet 2 of 4
Baseband / Memory / JTAG
MAIN CHIP
SMALL PACKAGE
T-FLASH
PCB_HOLE
J-TAG 34 PINS
Date:
Short : UART
Title
NC: SPI
AVDD_HFA_2.6V
R215
VDD_USB_3.3V
R214
7
8 TXD
2 VBUS
V_BATT
1
ANT
9
4 D+
6 D-
GND
3
HP_PWR
5
RXD
MAINTP200
VDD_PLL_1.2V
AVDD_2.6V
VDD_GSM_CORE_1.2V
VDD_IO_LOW_1.8V
VDD_SIM_3.0V
C217
C203
C210
VDD_SD_3.3V VDD_CAM_IO_2.8V VDD_IO_HIGH_2.9V
C208
BOTH_HOLE_201
C211
VDD_CAM_2.8V
R219
C206
VDD_IO_LOW_1.8V
R222
R217
VDD_IO_LOW_1.8V
TP_VSYNC
TP_HSYNC
R216
D-
GND
3
HP_PWR 5
RXD
7
8 TXD
2 VBUS
V_BATT
1
R205
JTAG201
ANT 9
4 D+
6
R202
VDD_SD_3.3V
R200
MIC_BIAS
TXD 8
VBUS
2
1 V_BATT
C204
JTAG200
9 ANT
D+ 4
D-
6
3 GND
5 HP_PWR
7 RXD
VDD_SD_3.3V
C207
3 4 5 6
ZD200
1
2
C212
VBAT
C209
V_JTAG
1
TP204
MASTER_JTAG_PAD
9 GND
PON_RESET_N 8
RTCK
3
TCK
6
TDI 5
7 TDO
2 TMS
4 TRST_N
VDD_SIM_3.0V VDD_IO_HIGH_2.9V
TP_WEn
TP_EXT
C216
7
U
U
Q
C
CV
8
U
O
Q
C
CV
9
U
VDD_IO_LOW_1.8V
VDD_IO_LOW_1.8V
VDD_SIM_3.0V
9T
NC
U1
NC
U10
U
O
R
QS
SV
2
U
R
Q
C
CV
3
U
R
Q
C
CV
4
U
R
Q
C
CV
5
U
R
Q
C
CV
6
U
U
O
R
QS
SV
01
T
_OER
T2
U
C
CV
3T
O
Q
C
CV
4T
O
Q
C
CV
5T
U
Q
C
CV
6T
U
Q
C
CV
7T
U
O
R
QS
SV
8T
O
Q
C
CV
R3
DQ10ROU
R4
DQ11ROU
R5
U
C
CV
6
R
DQ12ROU
R7
DQ13ROU
R8
DQ7ROU
R9
U
O
RS
SV
1T
U
C
CV
P5
DQ4ROU
P6
DQ5ROU
P7
DQ6ROU
P8
DQ15ROU
P9
O
C
CV
1
R
U
Q
C
CV
01
R
U
O
R
QS
SV
2
R
DQ0ROU
N7
DQ14ROU
N8
_OEO
N9
_CEO
P1
DNU
P10
RDYO
P2
DQ8ROU
P3
DQ2ROU
P4
DQ3ROU
M9
NC
N1
U
O
RS
SV
01
N
_CER
N2
DQ1ROU
N3
DQ9ROU
N4
U
O
RS
SV
5
N
R
C
CV
6
N
_OEU
L3
NC
L8
NC
L9
NC
M1
O
C
CV
01
M
_AVDRU
M2
CLKRU
M3
NC
M8
NC
K10
NC
K2
CLKO
K3
NC
K8
NC
K9
NC
L1
NC
L10
_AVDO
L2
RDYR|WAITU
H9
NC
J1
NC
J10
NC
J2
NC
J3
NC
J8
NC
J9
NC
K1
NC
G3
NC
G8
NC
G9
NC
H1
NC
H10
NC
H2
NC
H3
NC
H8
NC
F10
NC
F2
NC
F3
NC
F8
NC
F9
NC
G1
NC
G10
NC
G2
NC
E3
_CSU
E4
R
C
CV
5E
A19RU
E6
A9ROU
E7
A23RU
E8
R
C
CV
9E
NC
F1
NC
D5
A8ROU
D6
A22RU
D7
A10ROU
D8
NC
D9
A0ROU
E1
NC
E10
A17RU
E2
NC
C7
A11ROU
C8
A14ROU
C9
A1ROU
D1
NC
D10
A4ROU
D2
A5ROU
D3
_LBU
D4
_UBU
B9
U
C
CV
1
C
A16RU
C10
A3ROU
C2
A6ROU
C3
A18RU
C4
_WEO
C5
A21RU
C6
A20RU
B10
A2ROU
B2
A7ROU
B3
_RESETO
B4
_WEU
B5
O
C
CV
6
B
_RESETR
B7
U
C
CV
8
B
A13ROU
A3
RP
PV
4
A
U
C
CV
5
A
U
O
RS
SV
6
A
_WER
A7
U
O
RS
SV
8
A
A12ROU
A9
U
O
RS
SV
1
B
A15ROU
UME200
NC
1
NC
2
NC
A1
NC
A10
NC
A2
NC
TP203
TP_HD_ZERO
C214
R203
BOTH_HOLE_200
TP_WAITn
R204
9 9
13
G G
14 15
G G
16
12 12
2 2
3 3 4 4
5 5
6
6
7 7
8 8
SIM200
1 1
10 10
11 11
TP206
TP_CLKBURST
TP_HA_ONE
C205
VDD_GSM_CORE_1.2V AVDD_2.6V
R201
TP205
TP_OEn
C224
TP_RAM
AVDD_2.6V
C223
VDD_USB_3.3V
C215
14
15
NC6
NC7 16
21
22 B_TXD
18 B_V_BATT 1
B_V_BUS
24 NC1
NC2 17
NC3 12
13
NC4
NC5
29
A_V_BATT
25
9
A_V_BUS
7 B_ANT
B_D+ 2
3
B_D-
B_GND
19
20 B_HP/PWR
B_RXD
6
34 A_ANT
A_D+ 10
11
A_D-
26 A_GND
A_GND 8
A_HP|PWR
27
28 A_RXD
A_TXD
23
23
30 30
31
31
32 32
33
33
4 4
5
5
6
JTAG202
C202
C221
TP_CS_FLASH
VDD_IO_LOW_1.8V
50
01
C201 C200
50
01
TP_BEn
TP_HA_ZERO
BOTH_HOLE_203
VDD_SIM_3.0V
GND3 12
13 GND4
9 SW
VDD
4
VSS 6
BOTH_HOLE_202
CD|DAT3 2
5
CLK
3 CMD
7 DAT0
DAT1
8
1
DAT2
GND1 10
11 GND2
C213
SD200
V3
HDP0
4V
B
BS
SV
V5
QP
V6
IP
7V
KL
CS
SV
MCLK
V8
9V
E
D
N
G
V12
AUXDAC3
31
V
FE
R
D
DV
V14
VREF
V15
MICBIAS
61
V
BV
D
DV
V17
GPIOB12
81
V
C
N
V2
WE_E
U5
QN
U6
IN
7
U
KL
C
D
DV
8
U
4
AS
SV
9
U
1E
D
DV
1V
C
N
AUXDAC1
V10
V11
AUXDAC2
41
U
FE
RS
SV
51
U
5
AS
SV
61
U
E
D
N
G
U17
GPIOA15
U18
GPIOA21
U2
GPIOA6
U3
BE1
4
U
B
B
D
DV
T7
HDP17
T8
HDP14
T9
GPIOA11
U1
HDP4
U10
GPIOB5
U11
GPIOA28
U12
GPIOA24
31
U
E
D
N
G
T16
GPIOA20
T17
GPIOA30
T18
GPIOA22
T2
HDP7
T3
HDP6
T4
OE_R_W
T5
HDP5
RP
E
D
DV
6T
R9
GPIOA2
T1
HDP8
T10
TXDP1
T11
GPIOA25
T12
GPIOA27
T13
GPIOB8
T14
GPIOB10
GPIOB13
T15
R18
GPIOA23
R2
HDP9
R3
GPIOA8
R4
HDP1
R5
HDP3
R6
HDP11
R7
HDP16
GPIOA10
R8
R10
GPIOA18
R11
GPIOA16
R12
GPIOA13
R13
GPIOA14
R14
GPIOB9
R15
GPIOB11
R16
RFSIG0
RFSIG1
R17
GPIOA0
P4
HDP2
P5
HDP12
P6
HDP15
7P
C
D
N
G
P8
GPIOA1
P9
GPIOA12
GPIOA5
R1
P12
P13
GPIOA29
P14
GPIOA17
P15
KCOL0
P16
RFSIG2
P17
RFSIG6
P18
GPIOA3
P2
CS0
P3
N18
ANL
N2
ADD20
N3
CS3
N4
CS1
N5
HDP13
P1
ADD27
P10
GPIOA19
P11
GPIOA31
GPIOA26
7
M
1E
D
DV
8
M
C
D
DV
9
M
2E
D
DV
N1
GPIOA4
N14
KCOL1
N15
KCOL3
N16
RFSIG7
N17
ANR
M15
KROW2
M16
RFDO1
M17
AUXMICP
M18
AUXMICN
M2
ADD18
M3
ADD19
M4
ADD23
M5
HDP10
7L
1E
D
DV
8L
E
D N
G
9L
E
D N
G
M1
GPIOB2
01
M
C
D
DV
11
M
2E
D
DV
21
M
5E
D
DV
M14
KCOL2
L15
KROW4
SCL2
L16
L17
MICP
L18
MICN
L2
TDO
L3
RTCK
L4
ADD22
L5
GPIOA7
7
K
1E
D
DV
C
D N
G
8
K
9
K
C
D N
G
1L
C
D N
G
01
L
E
D N
G
11
L
1E
D
DV
21
L
C
D
DV
L14
KCOL4
K15
KROW1
K16
RFEN0
K17
CAMDATA2
81
K
BV
SS
V
K2
ADC4
K3
JSEL
K4
GPIOA9
K5
ADD21
7J
1E
D
DV
8J
C
D N
G
9J
E
D N
G
K1
ADC3
01
K
E
D
N
G
11
K
C
D
N
G
21
K
C
D
N
G
K14
KROW0
J15
CAMCLKI
J16
RFCLK1
J17
CAMCLKO
J18
EAR2
J2
ADC2
J3
TCK
J4
IO30
J5
GPON1
7
H
C
D
DV
8
H
E
D N
G
9
H
C
D
DV
J1
ADC1
01
J
E
D
N
G
11
J
E
D
N
G
21
J
7E
D
DV
J14
KROW3
H15
CAMDATA1
H16
SDA1
H17
EAR1
81
H
C
D
DV
H2
TRST
H3
TMS
H4
IO28
H5
GPON0
7
G
1E
D
DV
8
G
1E
D
DV
1E
D
DV
9
G
1
H
C
D
DV
01
H
C
D N
G
11
H
E
D N
G
21
H
E
D N
G
H14
SCL1
G15
CAMDATA3
G16
CAMHS
CAMDATA4
G17
G18
HFR2
2
G
2
DS
SV
G3
IO26
G4
IO29
G5
IO31
F3
IO27
F4
IO25
ADV
F5
1
G
2
D
D
DV
01
G
6E
D
DV
11
G
6E
D
DV
21
G
4E
D
DV
G14
SDA2
9E
2
A
D
DV
F1
TDI
F14
CAMDATA0
F15
CAMDATA5
F16
CAMDATA6
F17
SIMIO
81
F
O
BV
SS
V
F2
RESET
E18
HFR1
E2
IO24
E3
IO21
E4
IO23
E5
IO19
6E
C
D
DV
7E
E
D N
G
E8
CLK32I
E10
RSTBB
E11
VDED2
E12
CAMDATA7
CAMVS
E13
E14
SIMPWR
E15
VDED4
E16
VDED6
E17
VDED0
D3
IO20
D4
IO14
5
D
E
D
N
G
D6
IO11
D7
RSTEXT
D8
CKITST
9
D
2
A
D
N
G
E1
IO22
D12
SIMCLK
D13
VDED1
D14
VDED3
D15
VDED7
D16
VDED9
D17
VDED5
81
D
O
BV
D
DV
D2
IO18
5
C
RP
E
D
DV
C6
IO3
C7
IO1
8
C
U
G
C
D
DV
C9
VDED_C
1
D
RP
E
D
DV
D10
VDECS2
D11
SIMRST
C14
USBRREF
C15
VDED11
C16
VDED12
C17
VDED8
C18
VDED10
C2
IO17
C3
IO12
C4
ADD0_BE0
B7
IO0
B8
FSC
9
B
2
D
D
DV
C1
IO16
C10
VDECS1
C11
GPIOC18
C12
USBVBUS
31
C
3E
D
DV
B16
VDEEOF_CLK27M
B17
VDED15
B18
VDED13
B2
IO15
B3
IO10
B4
IO7
B5
IO5
B6
IO2
9
A
2
DS
SV
B1
ADD1_BE2
B10
MCLKSEL
11
B
A
D
DV
BS
U
USBGNDA
B12
31
B
M
RE
T
AS
SV
BS
U
B14
USBID
B15
VDERD
81
A
C
N
A2
IO13
A3
IO9
A4
IO8
IO6
A5
A6
IO4
A7
DD
A8
DU
A10
DCL
11
A
V
R
D
A
D DV
BS
U
A12
USBDP
A13
USBDM
41
A
FE
R
AS
SV
BS
U
3
A
D
DV
51
A
A16
VDEWR
A17
VDED14
WEn
U200
1
C
N
2
C
N
1
A
C
N
RSTEXTn
WEn
OEn
CLKBURST
WAITn
ADVn
HA(1:16)
HA(1)
HA(2)
HA(3)
HA(4)
HA(5)
HA(6)
HA(7)
HA(8)
HA(9)
HA(10)
HA(11)
HA(12)
HA(13)
HA(14)
HA(15)
HA(16)
WAITn
CLKBURST
ADVn
OEn
CS1n_RAM
BE1n
HA(0)
WEn
CS0n_FLASH
RSTEXTn
OEn
HD(0:15)
HD(0)
HD(1)
HD(2)
HD(3)
HD(4)
HD(5)
HD(6)
HD(7)
HD(8)
HD(9)
HD(10)
HD(11)
HD(12)
HD(13)
HD(14)
HD(15)
HA(17:24)
HA(17)
HA(18)
HA(19)
HA(20)
HA(21)
HA(22)
HA(23)
HA(24)
CS4n_NAND
HD(7)
HD(6)
HD(5)
HD(4)
HD(3)
HD(2)
HD(1)
HD(0)
HD(0:15)
HA(5)
HA(4)
HA(3)
HA(2)
HA(2:17)
HD(15)
HD(14)
HD(11)
HD(10)
HD(9)
HD(8)
HA(15)
HA(14)
HA(13)
HA(12)
HA(11)
HA(10)
HA(9)
HA(8)
HA(7)
HA(6)
KEY_ROW(1)
KEY_ROW(0)
KEY_ROW(0:4)
KEY_COL(4)
KEY_COL(3)
KEY_COL(2)
KEY_COL(1)
KEY_COL(0)
KEY_COL(0:4)
HD(13)
HD(12)
HA(17)
HA(16)
LCDD(7)
LCDD(6)
LCDD(5)
LCDD(4)
LCDD(3)
LCDD(2)
LCDD(1)
LCDD(0)
LCDD(0:15)
KEY_ROW(4)
KEY_ROW(3)
KEY_ROW(2)
Y(2)
Y(1)
Y(0)
Y(0:5)
LCDD(15)
LCDD(14)
LCDD(13)
LCDD(12)
LCDD(11)
LCDD(10)
LCDD(9)
LCDD(8)
HDP(3)
HDP(2)
HDP(1)
HDP(1:13)
HA(20)
HA(19)
HA(23)
HA(22)
HA(21)
HA(18)
HA(18:23)
Y(5)
Y(4)
Y(3)
TEMP_PRODUCT
VF
MES_BATT
BT_RESET
HDP(13)
HDP(12)
HDP(11)
HDP(10)
HDP(9)
HDP(8)
HDP(7)
HDP(6)
HDP(5)
HDP(4)
SIMOFFn
SD_CLK
SD_DATA(0)
SD_CMD
CTS2
RXD2
REF_ON
HA(24)
TXD2
RTS2
HA(0)
WIFI_MISO
EAR_N
EAR_P
RCV_N
RCV_P
SD_DATA(3)
SD_DATA(2)
SD_DATA(1)
FM_R
FM_L
ADVn
WIFI_CS
TSP_SCL
FLIP
MOD_SEL
HA(1)
RXD1
WAITn
CLKBURST
BE1n
PCM_CLK
PCM_IN
Y(6)
WIFI_INT
Y(7)
IMO
TSP_INT
CAM_RESET
WIFI_CLK
TDO
CS1n_RAM
TCK
TDI
CAM_SCL
CAM_SDA
RTCK
TMS
RSTEXTn
RSTON
RSTEXTn
PCM_OUT
PCM_SYNC
USB_D+
USB_D-
OEn
RF_CLK
WEn
RF_EN
CS0n_FLASH
RF_DATA
MICP
J_SEL
MICN
TXD1
TRSTn
CLK32K
D_REF_CLK
RX_TX_IN
RX_TX_QN
RX_TX_IP
RX_TX_QP
RAMP
BAND_SEL
KEY_COL(6)
FLM
L_RS
LCD_MAIN_CS
+VBUS_DETECT
L_WR
KEY_COL(5)
SIMRST
SIMIO
SIMCLK
LCD_RD
VCORE_CTRL
CS4n_NAND
M_CLK
P_CLK
SCL
SDA
HSYNC
VSYNC
AUXMIC_P
AUXMIC_N
MOT_PWM
KEY_ROW(5)
KEY_ROW(6)
PON_PA
BT_INT
TSP_RST
3PI_DETECT
MOT_EN
LCD_RST
WIFI_MOSI
WIFI_SHDN
EAR_SWITCH
INT_PMU
WIFI_RESET
VDD_CAM_EN
LCD_BL_EN
TSP_SDA
AUX_ON_J
USB_D-_J
USB_D+_J
TXD1_J
RXD1_J
+VBUS_J
TDO
TCK
TDI
RTCK
TMS
TRSTn
RSTON
VDD_IO_LOW_1.8V USB_DM_J_B
USB_DP_J_B
VBUS_5.0V_J_B
TXD1_J_B
RXD1_J_B
AUX_ON_J_B
VBAT_A
VBAT_B
GND_B
GND_A
GND_A
USB_DP_J_A
TXD1_J_A
RXD1_J_A
VBAT_A
AUX_ON_J_B
VBUS_5.0V_J_B
USB_DM_J_B
USB_DP_J_B
TXD1_J_B
RXD1_J_B
VBAT_B
GND_A
GND_B
VBUS_5.0V_J_A
USB_DM_J_A
USB_DP_J_A
TXD1_J_A
RXD1_J_A
AUX_ON_J_A
SIMIO
SIMRST
SIMCLK
SD_DATA(2)
SD_DATA(3)
SD_CMD
SD_CLK
SD_DATA(1)
SD_DATA(0)
AUX_ON_J_A
VBUS_5.0V_J_A
USB_DM_J_A