Samsung
Confidential
RTC
LAN / GLAN
IHDA
SATA
CPU
LPC
IDE
1 / 5
B
DRAW
APPROVAL
1608
1608
3
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
Distance b/w the ICH8-M & cap on the "P" signal should be identical
LAST EDIT
MODULE CODE
SATA Cap. Place ment :
TITLE
CHECK
DATE
PART NO.
Place 56 ohm resistor within 2" of ICH7-M
Place PU resistor within 2" of 56ohm res.
PAGE
OF
C
distance b/w the ICH8-M & cap on the "N" signal same pair.
ELECTRONICS
COM-22C-015(1996.6.5) REV. 3
SAMSUNG ELECTRONICS CO’S PROPERTY.
1.0
October 23, 2007 10:38:02 AM
BA41-XXXXX
20
58
Gevena
ICH8-M
ICH8-M (1/5)
D:/tingting/geneva/Geneva_pr_1023
D
DEV. STEP
B
D
A
REV
A
EXCEPT AS AUTHORIZED BY SAMSUNG.
THIS DOCUMENT CONTAINS CONFIDENTIAL
4
3
For RTC Reset
PROPRIETARY INFORMATION THAT IS
SAMSUNG PROPRIETARY
C
SAMSUNG
1
Place within 500 mils of ICH8-M
4
1
2
2
6
SUN XIAO
WUSHIJIANG
KEVIN LEE
6/26/2007
PV2
11-D4
C544
1000nF
C988
4.7nF
63-C3
64-C3
SATA2RXN
AF2
SATA2RXP
AF1
SATA2TXN
AE4
SATA2TXP
AE3
SATALED*
AF10
SATARBIAS
AG2
SATARBIAS*
AG1
SATA_CLKN
AB7
SATA_CLKP
AC6
AG28
SMI*
AA24
STPCLK*
AE27
THRMTRIP*
TP8
AA23
25V
LAN_TXD2
C20
LDRQ0*
G9
LDRQ1*_GPIO23
E6
NMI
AD23
RCIN*
AH14
RTCRST*
AF23
RTCX1
AG25
RTCX2
AF24
SATA0RXN
AF6
SATA0RXP
AF5
SATA0TXN
AH5
SATA0TXP
AH6
SATA1RXN
AG3
SATA1RXP
AG4
SATA1TXN
AJ4
SATA1TXP
AJ3
HDA_SDOUT
AE13
HDA_SYNC
AJ15
Y3
IDEIRQ
AF27
IGNNE*
AE24
INIT*
AC20
INTR
AD22
INTRUDER*
AF25
INTVRMEN
IORDY
Y1
LAN100_SLP
AD21
LAN_RSTSYNC
D22
LAN_RXD0
C21
LAN_RXD1
B21
LAN_RXD2
C22
LAN_TXD0
D21
LAN_TXD1
E20
FWH1_LAD1
F5
FWH2_LAD2
G8
FWH3_LAD3
F6
C4
FWH4_LFRAME*
GLAN_CLK
B24
GLAN_COMPI
D25
GLAN_COMPO
C25
GLAN_DOCK*_GPIO13
AH21
HDA_BIT_CLK
AJ16
HDA_DOCK_EN*_GPIO33
AE10
HDA_DOCK_RST*_GPIO34
AG14
HDA_RST*
AE14
HDA_SDIN0
AJ17
HDA_SDIN1
AH17
HDA_SDIN2
AH15
HDA_SDIN3
AD13
DD2
V3
DD3
T1
DD4
V4
DD5
T5
DD6
AB2
DD7
T6
DD8
T3
DD9
R2
DDACK*
Y2
DDREQ
W5
DIOR*
W4
DIOW*
W3
AF26
DPRSTP*
AE26
DPSLP*
FERR*
AD24
FWH0_LAD0
E5
AF13
A20GATE
AG26
A20M*
CPUPWRGD_GPIO49
AG29
DA0
AA4
DA1
AA1
DA2
AB3
DCS1*
Y6
DCS3*
Y5
DD0
V1
DD1
U2
DD10
T4
DD11
V6
DD12
V5
DD13
U1
DD14
V2
DD15
U6
R159
33
NH82801HBM
U33-1
C943
4.7nF 25V
VCCP_CORE
64-C3
33
R198
C180
0.007nF
63-C3
0
65-C2
3
64-C3
64-C3 63-C3
1K
R520
1%
R178
1%
56.2
63-C3
0.007nF
C189
10-C3
40-C4
71-B3
65-D2
63-C3
64-C3
0
R200
33
20-D3
8
25-D3
8-B1
12
3
HDR-2P-SMD
J506
1
2
10-B3
20-B4
D500
BAT54C
63-C3
64-C3
10
25-D3
10-B3
C944
4.7nF 25V
10-B3
2
33
R158
R269
24.9
9
63-B3
51-B3
21-B3
1%
20-D3
63-B3
21-B3
63-B3
64-C4 64-C2
63-C3
1%
20K
R521
R194
33
13
14
63-C3
64-C3
VCCP_CORE
63-C3
64-C3
10-C3
4
63-C3
64-C3
1
R215
10K
8-B1
66-A3 65-C3 51-C3
NO_STUFF
14-B1
11-C4
50-C2
1%
NO_STUFF
40-C4
1%
1M
R523
10-C3
63-C3
64-C3
R202
1K
65-C3
51-C3
66-A3
33
R204
PRTC_BAT
65-C1
40-C4
50-C2
0.032768MHz
Y1
1
4
2
3
1%
R173
24.9
65-C2
10-C3
4.7nF
C987
C545
1000nF
TP19112
14-B1
60-C4
11-D4
TP19114
25V
P1.5V
11-C4
TP19110
65-C2
R177
10M
R205
33
10-B3
1
P3.3V
63-B3
5
1%
R522
1M
63-B2
20-B4
11
65-C2
12
63-B3
2
7
1%
R219
24.9
21-B3
51-B3
63-C3
64-C3
P3.3V
15
40-C4
3
33
R196
P3.3V_MICOM
1%
56.2
R176
CHP3_INTRUDER#
CHP3_LDRQ1#
MDC3_SDO
CHP3_RTCRST#
AUD3_RST#
AUD3_SDO
CHP3_SATALED#
CHP3_INTVRMEN
MDC3_RST#
CHP3_LAN100_SLP
MDC3_SYNC
AUD3_BCLK
MDC3_BCLK
SAT1_RXN0
SAT1_TXN0
SAT1_TXP0
CPU1_DPSLP#
KBC3_CPURST#
IDE5_D(0:15)
IDE5_CS1#
IDE5_CS3#
IDE5_A0
IDE5_A1
IDE5_A2
CPU1_THRMTRIP#
CHP3_INTRUDER#
CLK1_SATA
SAT1_RXP0
CPU1_DPRSTP#
CPU1_PWRGDCPU
KBC3_A20G
IDE5_IDEIRQ
IDE5_DREQ
IDE5_DACK#
IDE5_IOW#
IDE5_IORDY
LPC3_LAD(3:0)
CHP3_LDRQ0#
LPC3_LFRAME#
CPU1_A20M#
CPU1_FERR#
CPU1_IGNNE#
CPU1_INIT#
CPU1_INTR
CPU1_NMI
CPU1_SMI#
CPU1_STPCLK#
CLK1_SATA#
CHP3_RTCRST#
AUD3_SDI0
MDC3_SDI1
AUD3_SYNC
IDE5_IOR#
